1 /* 2 * Copyright (c) 2018 Foundries.io Ltd 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 /* 8 * Extra definitions required for CONFIG_RISCV_SOC_OFFSETS. 9 */ 10 11 #ifndef SOC_RISCV32_OPENISA_RV32M1_SOC_OFFSETS_H_ 12 #define SOC_RISCV32_OPENISA_RV32M1_SOC_OFFSETS_H_ 13 14 #include <fsl_device_registers.h> 15 16 #ifdef CONFIG_SOC_OPENISA_RV32M1_RI5CY 17 18 #ifdef CONFIG_RISCV_SOC_CONTEXT_SAVE 19 /* 20 * Ensure offset macros are available in <offsets.h>. 21 * 22 * Also create a macro which contains the value of &EVENT0->INTPTPENDCLEAR, 23 * for use in assembly. 24 */ 25 #define GEN_SOC_OFFSET_SYMS() \ 26 GEN_OFFSET_SYM(soc_esf_t, lpstart0); \ 27 GEN_OFFSET_SYM(soc_esf_t, lpend0); \ 28 GEN_OFFSET_SYM(soc_esf_t, lpcount0); \ 29 GEN_OFFSET_SYM(soc_esf_t, lpstart1); \ 30 GEN_OFFSET_SYM(soc_esf_t, lpend1); \ 31 GEN_OFFSET_SYM(soc_esf_t, lpcount1); \ 32 GEN_ABSOLUTE_SYM(__EVENT_INTPTPENDCLEAR, \ 33 (uint32_t)&EVENT0->INTPTPENDCLEAR) 34 #else 35 36 #define GEN_SOC_OFFSET_SYMS() \ 37 GEN_ABSOLUTE_SYM(__EVENT_INTPTPENDCLEAR, \ 38 (uint32_t)&EVENT0->INTPTPENDCLEAR) 39 40 #endif /* CONFIG_RISCV_SOC_CONTEXT_SAVE */ 41 42 #endif /* CONFIG_SOC_OPENISA_RV32M1_RI5CY */ 43 44 #ifdef CONFIG_SOC_OPENISA_RV32M1_ZERO_RISCY 45 46 #define GEN_SOC_OFFSET_SYMS() \ 47 GEN_ABSOLUTE_SYM(__EVENT_INTPTPENDCLEAR, \ 48 (uint32_t)&EVENT1->INTPTPENDCLEAR) 49 50 #endif /* CONFIG_SOC_OPENISA_RV32M1_ZERO_RISCY */ 51 52 #endif /* SOC_RISCV32_OPENISA_RV32M1_SOC_OFFSETS_H_ */ 53
