1# Copyright 2024 NXP
2# SPDX-License-Identifier: Apache-2.0
3
4config SOC_SERIES_MCXN
5	select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
6	select CLOCK_CONTROL
7	select ARM
8	select HAS_MCUX
9	select HAS_MCUX_FLEXCOMM
10	select CPU_CORTEX_M_HAS_SYSTICK
11	select CPU_CORTEX_M_HAS_DWT
12	select SOC_RESET_HOOK
13
14config SOC_MCXN947_CPU0
15	select CPU_CORTEX_M33
16	select CPU_HAS_ARM_SAU
17	select CPU_HAS_ARM_MPU
18	select CPU_HAS_FPU
19	select ARMV8_M_DSP
20	select ARM_TRUSTZONE_M
21	select HAS_MCUX_CACHE
22
23config SOC_MCXN236
24	select CPU_CORTEX_M33
25	select CPU_HAS_ARM_SAU
26	select CPU_HAS_ARM_MPU
27	select CPU_HAS_FPU
28	select ARMV8_M_DSP
29	select ARM_TRUSTZONE_M
30
31if SOC_SERIES_MCXN
32
33if SOC_MCXN947
34config SECOND_CORE_MCUX
35	bool "MCXN94X's second core"
36	depends on HAS_MCUX
37	help
38	  Indicates the second core will be enabled, and the part will run
39	  in dual core mode.
40
41config FLASH_DISABLE_CACHE64
42	bool "Disable the CACHE64 cache for FlexSPI flash accesses"
43	help
44	  Disable cache64 cache.
45
46config MCUX_CORE_SUFFIX
47	default "_cm33_core0" if SOC_MCXN947_CPU0
48	default "_cm33_core1" if SOC_MCXN947_CPU1
49endif
50
51rsource "../../common/Kconfig.flexspi_xip"
52
53endif # SOC_SERIES_MCXN
54