1# Kinetis K8x series MCU
2
3# Copyright (c) 2019 SEAL AG
4# Copyright 2024 NXP
5# SPDX-License-Identifier: Apache-2.0
6
7config SOC_SERIES_KINETIS_K8X
8	select ARM
9	select CPU_CORTEX_M4
10	select CPU_CORTEX_M_HAS_DWT
11	select CPU_HAS_NXP_SYSMPU
12	select CPU_HAS_FPU
13	select CLOCK_CONTROL
14	select HAS_MCUX
15	select HAS_MCUX_ADC16
16	select HAS_MCUX_FTFX
17	select HAS_MCUX_FTM
18	select HAS_MCUX_LPUART
19	select HAS_MCUX_PIT
20	select HAS_MCUX_RTC
21	select HAS_MCUX_SIM
22	select HAS_MCUX_TRNG
23	select HAS_OSC
24	select HAS_MCG
25	select HAS_MCUX_EDMA
26	select HAS_MCUX_PIT
27	select HAS_MCUX_RCM
28	select HAS_MCUX_CACHE
29	select SOC_RESET_HOOK
30	select SOC_EARLY_INIT_HOOK
31
32if SOC_SERIES_KINETIS_K8X
33
34config K8X_CORE_CLOCK_DIVIDER
35	int "Freescale K8x core clock divider"
36	default 1
37	help
38	  This option specifies the divide value for the K8x processor core clock
39	  from the system clock.
40
41config K8X_BUS_CLOCK_DIVIDER
42	int "Freescale K8x bus clock divider"
43	default 2
44	help
45	  This option specifies the divide value for the K8x bus clock from the
46	  system clock.
47
48config K8X_FLEXBUS_CLOCK_DIVIDER
49	int "Freescale K8x FlexBus clock divider"
50	default 2
51	help
52	  This option specifies the divide value for the K8x FlexBus clock from the
53	  system clock.
54
55config K8X_FLASH_CLOCK_DIVIDER
56	int "Freescale K8x flash clock divider"
57	default 5
58	help
59	  This option specifies the divide value for the K8x flash clock from the
60	  system clock.
61
62endif # SOC_SERIES_KINETIS_K8X
63