1 /*
2  * Copyright 2024 NXP
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 /**
8  * @file
9  * @brief Board configuration macros for the MIMXRT7XX platform
10  *
11  * This header file is used to specify and describe board-level aspects for the
12  * 'MIMXRT7XX' platform.
13  */
14 
15 #ifndef _SOC__H_
16 #define _SOC__H_
17 
18 #ifndef _ASMLANGUAGE
19 
20 #include <zephyr/sys/util.h>
21 #include <fsl_common.h>
22 
23 /* CPU 0 has an instruction and data cache, provide the defines for XCACHE */
24 #ifdef CONFIG_SOC_MIMXRT798S_CM33_CPU0
25 #define NXP_XCACHE_INSTR XCACHE1
26 #define NXP_XCACHE_DATA XCACHE0
27 #endif
28 
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
32 
33 void xspi_clock_safe_config(void);
34 void xspi_setup_clock(XSPI_Type *base, uint32_t src, uint32_t divider);
35 
36 #ifdef __cplusplus
37 }
38 #endif
39 
40 #endif /* !_ASMLANGUAGE */
41 
42 #endif /* _SOC__H_ */
43