1# Copyright 2024 NXP
2# SPDX-License-Identifier: Apache-2.0
3
4config SOC_SERIES_IMXRT118X
5	select CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS if SOC_MIMXRT1189_CM7
6	select CPU_CORTEX_M_HAS_DWT
7	select SOC_RESET_HOOK
8	select INIT_ARCH_HW_AT_BOOT if SOC_MIMXRT1189_CM33
9	select ARM
10	select CLOCK_CONTROL
11	select HAS_MCUX_CACHE
12	select ARMV8_M_DSP if SOC_MIMXRT1189_CM33
13	select CPU_HAS_ARM_SAU if SOC_MIMXRT1189_CM33
14	select HAS_MCUX
15	select CPU_HAS_ARM_MPU
16	select CPU_HAS_CUSTOM_FIXED_SOC_MPU_REGIONS if SOC_MIMXRT1189_CM33
17	select ARM_MPU if SOC_MIMXRT1189_CM33
18	select INIT_ARM_PLL
19	select ARM_TRUSTZONE_M if SOC_MIMXRT1189_CM33
20	select CPU_HAS_ICACHE if SOC_MIMXRT1189_CM7
21	select CPU_HAS_DCACHE if SOC_MIMXRT1189_CM7
22	select CPU_HAS_FPU
23	select CPU_HAS_FPU_DOUBLE_PRECISION if SOC_MIMXRT1189_CM7
24	select HAS_MCUX_IOMUXC
25	select HAS_SWO
26	select HAS_MCUX_FLEXSPI
27	select SOC_EARLY_INIT_HOOK
28
29config SOC_MIMXRT1189_CM33
30	select CPU_CORTEX_M33
31
32config SOC_MIMXRT1189_CM7
33	select CPU_CORTEX_M7
34
35if SOC_SERIES_IMXRT118X
36
37config IMAGE_CONTAINER_OFFSET
38	hex "Image container"
39	default 0x1000
40	help
41	  Image container is a boot image format that is used by ROM. Container
42	  format consists container header, image arrary entry, signature block
43	  and user program images and data. The boot ROM expects container data
44	  to be saved in external memory.
45
46# Note- This config present the offest between container header and user
47# image. If ROM_START_OFFSET changed, you also need to change CONTAINER_USER_IMAGE_OFFSET
48# value. CONTAINER_USER_IMAGE_OFFSET = ROM_START_OFFSET - IMAGE_CONTAINER_OFFSET.
49config CONTAINER_USER_IMAGE_OFFSET
50	hex "The offset between container header and user image"
51	default 0xA000
52	help
53	  The offset between container and user image. IF change the user image
54	  start address, please don't forget to modify CONTAINER_USER_IMAGE_OFFSET
55	  value, this will make ROM could get the user image start address.
56
57config MCUX_CORE_SUFFIX
58	default "_cm7" if SOC_MIMXRT1189_CM7
59	default "_cm33" if SOC_MIMXRT1189_CM33
60
61config TRDC_MCUX_TRDC
62	default y
63	bool "Use TRDC MCUX Driver"
64
65config S3MU_MCUX_S3MU
66	default y
67	bool "Use S3MU MCUX Driver"
68
69config IMXRT118X_CM33_XCACHE_PS
70	bool "Use CM33 XCACHE_PS"
71	default y if SOC_MIMXRT1189_CM33
72	help
73	  Use CM33 XCACHE_PS at boot. Please note XCACHE_PC have been
74	  enabled in SystemInit function. If this Kconfig is cleared,
75	  the XCACHE controller won't be enabled during SOC init
76
77endif # SOC_SERIES_IMXRT118X
78