1 /* 2 * Copyright 2024 NXP 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef ZEPHYR_SOC_NXP_IMX_IMX8ULP_PINCTR_SOC_H_ 8 #define ZEPHYR_SOC_NXP_IMX_IMX8ULP_PINCTR_SOC_H_ 9 10 #include <zephyr/devicetree.h> 11 #include "fsl_iomuxc.h" 12 13 #ifdef __cplusplus 14 extern "C" { 15 #endif 16 17 struct pinctrl_soc_pinmux { 18 uint32_t mux_register; 19 uint8_t mux_mode; 20 uint32_t input_register; 21 uint32_t input_daisy; 22 uint32_t config_register; 23 }; 24 25 struct pinctrl_soc_pin { 26 struct pinctrl_soc_pinmux pinmux; 27 uint32_t pin_ctrl_flags; 28 }; 29 30 typedef struct pinctrl_soc_pin pinctrl_soc_pin_t; 31 32 #define _PULL_IS_ENABLED(node_id)\ 33 (DT_PROP(node_id, bias_pull_up) || DT_PROP(node_id, bias_pull_down)) 34 35 #define _IMX8ULP_PIN_FLAGS(node_id) \ 36 ((DT_ENUM_IDX_OR(node_id, drive_strength, 0) << IOMUXC_PCR_DSE_SHIFT) | \ 37 (DT_PROP(node_id, drive_open_drain) << IOMUXC_PCR_ODE_SHIFT) | \ 38 (DT_ENUM_IDX_OR(node_id, slew_rate, 0) << IOMUXC_PCR_SRE_SHIFT) | \ 39 (DT_PROP(node_id, bias_pull_up) << IOMUXC_PCR_PS_SHIFT) | \ 40 (_PULL_IS_ENABLED(node_id) << IOMUXC_PCR_PE_SHIFT)) 41 42 #define _IMX8ULP_PINMUX(node_id) \ 43 { \ 44 .mux_register = DT_PROP_BY_IDX(node_id, pinmux, 0), \ 45 .config_register = DT_PROP_BY_IDX(node_id, pinmux, 4), \ 46 .input_register = DT_PROP_BY_IDX(node_id, pinmux, 2), \ 47 .mux_mode = DT_PROP_BY_IDX(node_id, pinmux, 1), \ 48 .input_daisy = DT_PROP_BY_IDX(node_id, pinmux, 3), \ 49 } 50 51 #define Z_PINCTRL_PINMUX(group_id, pin_prop, idx)\ 52 _IMX8ULP_PINMUX(DT_PHANDLE_BY_IDX(group_id, pin_prop, idx)) 53 54 #define Z_PINCTRL_STATE_PIN_INIT(group_id, pin_prop, idx) \ 55 { \ 56 .pinmux = Z_PINCTRL_PINMUX(group_id, pin_prop, idx), \ 57 .pin_ctrl_flags = _IMX8ULP_PIN_FLAGS(group_id), \ 58 }, 59 60 #define Z_PINCTRL_STATE_PINS_INIT(node_id, prop)\ 61 { DT_FOREACH_CHILD_VARGS(DT_PHANDLE(node_id, prop),\ 62 DT_FOREACH_PROP_ELEM, pinmux, Z_PINCTRL_STATE_PIN_INIT) }; 63 64 #ifdef __cplusplus 65 { 66 #endif 67 68 #endif /* ZEPHYR_SOC_NXP_IMX_IMX8ULP_PINCTR_SOC_H_ */ 69
