1# iMX7 M4 core series
2
3# Copyright 2017,2024 NXP
4# SPDX-License-Identifier: Apache-2.0
5
6if SOC_MCIMX7D_M4
7
8config SYS_CLOCK_HW_CYCLES_PER_SEC
9	default 200000000
10
11config GPIO
12	default y
13
14#-By default ROM_START is relocated to address 0 in a 1K region, allowing imx_rproc
15#  to translate it to OCRAM_S address
16#-Select the relocation if the chosen flash is not the OCRAM_S
17#-Disable this option if you use the bin format as this choice will enlarge it.
18#  This is due to relocation of the irq-vectors in a different memory region than
19#  the chosen zephyr,flash and all the address span in between
20#  will be filled in the bin file.
21config ROMSTART_RELOCATION_ROM
22	default n
23
24config ROMSTART_REGION_ADDRESS
25	default $(dt_nodelabel_reg_addr_hex,ocram_s_code)
26
27endif # SOC_MCIMX7D_M4
28