1# Copyright (c) 2024 Nordic Semiconductor ASA
2# SPDX-License-Identifier: Apache-2.0
3
4config RISCV_CORE_NORDIC_VPR
5	bool
6	select ATOMIC_OPERATIONS_C
7	select RISCV
8	select RISCV_PRIVILEGED
9	select RISCV_VECTORED_MODE
10	select RISCV_ISA_RV32E
11	select RISCV_ISA_EXT_M
12	select RISCV_ISA_EXT_C
13	select RISCV_ISA_EXT_ZICSR
14	select RISCV_SOC_HAS_ISR_STACKING
15	select RISCV_HAS_CLIC
16	select RISCV_SOC_CONTEXT_SAVE
17	select HAS_FLASH_LOAD_OFFSET
18	select ARCH_HAS_CUSTOM_CPU_IDLE
19	select ARCH_HAS_CUSTOM_CPU_ATOMIC_IDLE
20	select INCLUDE_RESET_VECTOR
21	imply XIP
22	help
23	  Enable support for the RISC-V Nordic VPR core.
24