1 /* Copyright (c) 2023 Intel Corporation
2  * SPDX-License-Identifier: Apache-2.0
3  */
4 #ifndef ZEPHYR_SOC_INTEL_ADSP_TGL_IMR_LAYOUT_H_
5 #define ZEPHYR_SOC_INTEL_ADSP_TGL_IMR_LAYOUT_H_
6 
7 /* These structs and macros are from the ROM code header
8  * on cAVS platforms, please keep them immutable.
9  *
10  * The ROM structs and code is lifted from:
11  * https://github.com/thesofproject/sof
12  * 6c0db22c65 - platform: cavs: configure resume from IMR
13  */
14 
15 /*
16  * A magic that tells ROM to jump to imr_restore_vector instead of normal boot
17  */
18 #define ADSP_IMR_MAGIC_VALUE		0x02468ACE
19 
20 struct imr_header {
21 	uint32_t adsp_imr_magic;
22 	uint32_t structure_version;
23 	uint32_t structure_size;
24 	uint32_t imr_state;
25 	uint32_t imr_size;
26 	void (*imr_restore_vector)(void);
27 };
28 
29 struct imr_state {
30 	struct imr_header header;
31 	uint8_t reserved[0x1000 - sizeof(struct imr_header)];
32 };
33 
34 struct imr_layout {
35 	uint8_t css_reserved[0x1000];
36 	struct imr_state imr_state;
37 };
38 
39 #endif /* ZEPHYR_SOC_INTEL_ADSP_TGL_IMR_LAYOUT_H_ */
40