1 /*
2 * Copyright (c) 2021 Espressif Systems (Shanghai) Co., Ltd.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 /* Include esp-idf headers first to avoid redefining BIT() macro */
8 #include <soc/rtc_cntl_reg.h>
9 #include <soc/timer_group_reg.h>
10 #include <soc/ext_mem_defs.h>
11 #include <soc/gpio_reg.h>
12 #include <soc/syscon_reg.h>
13 #include <soc/system_reg.h>
14 #include "hal/wdt_hal.h"
15 #include "esp_cpu.h"
16 #include "hal/soc_hal.h"
17 #include "hal/cpu_hal.h"
18 #include "esp_timer.h"
19 #include "esp_private/system_internal.h"
20 #include "esp_clk_internal.h"
21 #include <soc/interrupt_reg.h>
22 #include <esp_private/spi_flash_os.h>
23 #include "esp_private/esp_mmu_map_private.h"
24 #include <esp_flash_internal.h>
25
26 #include <zephyr/drivers/interrupt_controller/intc_esp32c3.h>
27
28 #include <zephyr/kernel_structs.h>
29 #include <kernel_internal.h>
30 #include <string.h>
31 #include <zephyr/toolchain.h>
32 #include <soc.h>
33
34 extern void esp_reset_reason_init(void);
35
36 /*
37 * This is written in C rather than assembly since, during the port bring up,
38 * Zephyr is being booted by the Espressif bootloader. With it, the C stack
39 * is already set up.
40 */
__esp_platform_start(void)41 void __attribute__((section(".iram1"))) __esp_platform_start(void)
42 {
43 __asm__ __volatile__("la t0, _esp32c3_vector_table\n"
44 "csrw mtvec, t0\n");
45
46 z_bss_zero();
47
48 /* Disable normal interrupts. */
49 csr_read_clear(mstatus, MSTATUS_MIE);
50
51 esp_reset_reason_init();
52
53 #ifndef CONFIG_MCUBOOT
54 /* ESP-IDF 2nd stage bootloader enables RTC WDT to check on startup sequence
55 * related issues in application. Hence disable that as we are about to start
56 * Zephyr environment.
57 */
58 wdt_hal_context_t rtc_wdt_ctx = {.inst = WDT_RWDT, .rwdt_dev = &RTCCNTL};
59
60 wdt_hal_write_protect_disable(&rtc_wdt_ctx);
61 wdt_hal_disable(&rtc_wdt_ctx);
62 wdt_hal_write_protect_enable(&rtc_wdt_ctx);
63
64 /* Enable wireless phy subsystem clock,
65 * This needs to be done before the kernel starts
66 */
67 REG_CLR_BIT(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_SDIOSLAVE_EN);
68 SET_PERI_REG_MASK(SYSTEM_WIFI_CLK_EN_REG, SYSTEM_WIFI_CLK_EN);
69
70 esp_timer_early_init();
71
72 esp_mspi_pin_init();
73
74 esp_flash_app_init();
75
76 esp_mmu_map_init();
77
78 #endif /* !CONFIG_MCUBOOT */
79
80 /*Initialize the esp32c3 interrupt controller */
81 esp_intr_initialize();
82
83 /* Start Zephyr */
84 z_cstart();
85
86 CODE_UNREACHABLE;
87 }
88
89 /* Boot-time static default printk handler, possibly to be overridden later. */
arch_printk_char_out(int c)90 int IRAM_ATTR arch_printk_char_out(int c)
91 {
92 if (c == '\n') {
93 esp_rom_uart_tx_one_char('\r');
94 }
95 esp_rom_uart_tx_one_char(c);
96 return 0;
97 }
98
sys_arch_reboot(int type)99 void sys_arch_reboot(int type)
100 {
101 esp_restart_noos();
102 }
103
