1 /* 2 * Copyright (c) 2021 Argentum Systems Ltd. 3 * Copyright (c) 2024 Gerson Fernando Budke <nandojve@gmail.com> 4 * 5 * SPDX-License-Identifier: Apache-2.0 6 */ 7 8 #ifndef _SOC_ATMEL_SAM0_SAML21_SOC_H_ 9 #define _SOC_ATMEL_SAM0_SAML21_SOC_H_ 10 11 #ifndef _ASMLANGUAGE 12 13 #define DONT_USE_CMSIS_INIT 14 15 #if defined(CONFIG_SOC_SAML21E15B) 16 #include <saml21e15b.h> 17 #elif defined(CONFIG_SOC_SAML21E16B) 18 #include <saml21e16b.h> 19 #elif defined(CONFIG_SOC_SAML21E17B) 20 #include <saml21e17b.h> 21 #elif defined(CONFIG_SOC_SAML21E18B) 22 #include <saml21e18b.h> 23 #elif defined(CONFIG_SOC_SAML21G16B) 24 #include <saml21g16b.h> 25 #elif defined(CONFIG_SOC_SAML21G17B) 26 #include <saml21g17b.h> 27 #elif defined(CONFIG_SOC_SAML21G18B) 28 #include <saml21g18b.h> 29 #elif defined(CONFIG_SOC_SAML21J16B) 30 #include <saml21j16b.h> 31 #elif defined(CONFIG_SOC_SAML21J17B) 32 #include <saml21j17b.h> 33 #elif defined(CONFIG_SOC_SAML21J18B) 34 #include <saml21j18b.h> 35 #elif defined(CONFIG_SOC_SAML21J17BU) 36 #include <saml21j17bu.h> 37 #elif defined(CONFIG_SOC_SAML21J18BU) 38 #include <saml21j18bu.h> 39 #else 40 #error Library does not support the specified device. 41 #endif 42 43 #endif /* _ASMLANGUAGE */ 44 45 #define ADC_SAM0_REFERENCE_ENABLE_PROTECTED 46 47 #include "adc_fixup_sam0.h" 48 #include "../common/soc_port.h" 49 #include "../common/atmel_sam0_dt.h" 50 51 /** Processor Clock (HCLK) Frequency */ 52 #define SOC_ATMEL_SAM0_HCLK_FREQ_HZ ATMEL_SAM0_DT_CPU_CLK_FREQ_HZ 53 54 /** Master Clock (MCK) Frequency */ 55 #define SOC_ATMEL_SAM0_MCK_FREQ_HZ SOC_ATMEL_SAM0_HCLK_FREQ_HZ 56 #define SOC_ATMEL_SAM0_OSC32K_FREQ_HZ 32768 57 #define SOC_ATMEL_SAM0_XOSC32K_FREQ_HZ 32768 58 #define SOC_ATMEL_SAM0_OSC16M_FREQ_HZ 16000000 59 #define SOC_ATMEL_SAM0_GCLK0_FREQ_HZ SOC_ATMEL_SAM0_MCK_FREQ_HZ 60 #define SOC_ATMEL_SAM0_GCLK3_FREQ_HZ 24000000 61 62 #if defined(CONFIG_SOC_ATMEL_SAML_OPENLOOP_AS_MAIN) 63 #define SOC_ATMEL_SAM0_GCLK1_FREQ_HZ 0 64 #elif defined(CONFIG_SOC_ATMEL_SAML_OSC32K_AS_MAIN) 65 #define SOC_ATMEL_SAM0_GCLK1_FREQ_HZ SOC_ATMEL_SAM0_OSC32K_FREQ_HZ 66 #elif defined(CONFIG_SOC_ATMEL_SAML_XOSC32K_AS_MAIN) 67 #define SOC_ATMEL_SAM0_GCLK1_FREQ_HZ SOC_ATMEL_SAM0_XOSC32K_FREQ_HZ 68 #elif defined(CONFIG_SOC_ATMEL_SAML_OSC16M_AS_MAIN) 69 #define SOC_ATMEL_SAM0_GCLK1_FREQ_HZ SOC_ATMEL_SAM0_OSC16M_FREQ_HZ 70 #else 71 #error Unsupported GCLK1 clock source. 72 #endif 73 74 #define SOC_ATMEL_SAM0_APBA_FREQ_HZ SOC_ATMEL_SAM0_MCK_FREQ_HZ 75 #define SOC_ATMEL_SAM0_APBB_FREQ_HZ SOC_ATMEL_SAM0_MCK_FREQ_HZ 76 #define SOC_ATMEL_SAM0_APBC_FREQ_HZ SOC_ATMEL_SAM0_MCK_FREQ_HZ 77 78 #endif /* _SOC_ATMEL_SAM0_SAML21_SOC_H_ */ 79
