1 /*
2  * Copyright (c) 2019 Linaro Limited
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #include <soc.h>
8 #include <zephyr/linker/linker-defs.h>
9 
10 /* (Secure System Control) Base Address */
11 #define SSE_200_SYSTEM_CTRL_S_BASE	(0x50021000UL)
12 #define SSE_200_SYSTEM_CTRL_INITSVTOR1	(SSE_200_SYSTEM_CTRL_S_BASE + 0x114)
13 #define SSE_200_SYSTEM_CTRL_CPU_WAIT	(SSE_200_SYSTEM_CTRL_S_BASE + 0x118)
14 #define SSE_200_CPU_ID_UNIT_BASE	(0x5001F000UL)
15 
16 #define NON_SECURE_FLASH_ADDRESS	(0x60000)
17 #define NON_SECURE_FLASH_OFFSET	(0x10000000)
18 #define BL2_HEADER_SIZE		(0x400)
19 
20 /**
21  * @brief Wake up CPU 1 from another CPU, this is platform specific.
22  *
23  */
wakeup_cpu1(void)24 void wakeup_cpu1(void)
25 {
26 	/* Set the Initial Secure Reset Vector Register for CPU 1 */
27 	*(uint32_t *)(SSE_200_SYSTEM_CTRL_INITSVTOR1) =
28 					(uint32_t)_vector_start +
29 					NON_SECURE_FLASH_ADDRESS -
30 					NON_SECURE_FLASH_OFFSET;
31 
32 	/* Set the CPU Boot wait control after reset */
33 	*(uint32_t *)(SSE_200_SYSTEM_CTRL_CPU_WAIT) = 0;
34 }
35 
36 /**
37  * @brief Get the current CPU ID, this is platform specific.
38  *
39  * @return Current CPU ID
40  */
sse_200_platform_get_cpu_id(void)41 uint32_t sse_200_platform_get_cpu_id(void)
42 {
43 	volatile uint32_t *p_cpu_id = (volatile uint32_t *)SSE_200_CPU_ID_UNIT_BASE;
44 
45 	return (uint32_t)*p_cpu_id;
46 }
47