1 /*
2  * Copyright (c) 2016 Linaro Limited.
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #include <zephyr/device.h>
8 #include <zephyr/init.h>
9 #include <zephyr/pm/pm.h>
10 #include <soc.h>
11 #include <soc_power.h>
12 #include <zephyr/arch/cpu.h>
13 
14 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio0))
15 #define CLK_BIT_GPIO0	_BEETLE_GPIO0
16 #else
17 #define CLK_BIT_GPIO0	0
18 #endif
19 
20 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(gpio1))
21 #define CLK_BIT_GPIO1	_BEETLE_GPIO1
22 #else
23 #define CLK_BIT_GPIO1	0
24 #endif
25 
26 #define AHB_CLK_BITS (CLK_BIT_GPIO0 | CLK_BIT_GPIO1)
27 
28 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(timer0))
29 #define CLK_BIT_TIMER0	_BEETLE_TIMER0
30 #else
31 #define CLK_BIT_TIMER0	0
32 #endif
33 
34 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(timer1))
35 #define CLK_BIT_TIMER1	_BEETLE_TIMER1
36 #else
37 #define CLK_BIT_TIMER1	0
38 #endif
39 
40 #ifdef CONFIG_RUNTIME_NMI
41 #define CLK_BIT_WDOG	_BEETLE_WDOG
42 #else
43 #define CLK_BIT_WDOG	0
44 #endif
45 
46 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(uart0))
47 #define CLK_BIT_UART0	_BEETLE_UART0
48 #else
49 #define CLK_BIT_UART0	0
50 #endif
51 
52 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(uart1))
53 #define CLK_BIT_UART1	_BEETLE_UART1
54 #else
55 #define CLK_BIT_UART1	0
56 #endif
57 
58 #define APB_CLK_BITS (CLK_BIT_TIMER0 | CLK_BIT_TIMER1 \
59 		| CLK_BIT_WDOG | CLK_BIT_UART0 | CLK_BIT_UART1)
60 
61 /**
62  * @brief Setup various clock on SoC in active state.
63  *
64  * Configures the clock in active state.
65  */
clock_active_init(void)66 static ALWAYS_INLINE void clock_active_init(void)
67 {
68 	/* Enable AHB and APB clocks */
69 	/* Configure AHB Peripheral Clock in active state */
70 	__BEETLE_SYSCON->ahbclkcfg0set = AHB_CLK_BITS;
71 
72 	/* Configure APB Peripheral Clock in active state */
73 	__BEETLE_SYSCON->apbclkcfg0set = APB_CLK_BITS;
74 }
75 
76 /**
77  * @brief Configures the clock that remain active during sleep state.
78  *
79  * Configures the clock that remain active during sleep state.
80  */
clock_sleep_init(void)81 static ALWAYS_INLINE void clock_sleep_init(void)
82 {
83 	/* Configure APB Peripheral Clock in sleep state */
84 	__BEETLE_SYSCON->apbclkcfg1set = APB_CLK_BITS;
85 }
86 
87 /**
88  * @brief Configures the clock that remain active during deepsleep state.
89  *
90  * Configures the clock that remain active during deepsleep state.
91  */
clock_deepsleep_init(void)92 static ALWAYS_INLINE void clock_deepsleep_init(void)
93 {
94 	/* Configure APB Peripheral Clock in deep sleep state */
95 	__BEETLE_SYSCON->apbclkcfg2set = APB_CLK_BITS;
96 }
97 
98 /**
99  * @brief Setup initial wakeup sources on SoC.
100  *
101  * Setup the SoC wakeup sources.
102  *
103  */
wakeup_src_init(void)104 static ALWAYS_INLINE void wakeup_src_init(void)
105 {
106 	/* Configure Wakeup Sources */
107 	__BEETLE_SYSCON->pwrdncfg1set = APB_CLK_BITS;
108 }
109 
110 /**
111  * @brief Setup various clocks and wakeup sources in the SoC.
112  *
113  * Configures the clocks and wakeup sources in the SoC.
114  */
soc_power_init(void)115 void soc_power_init(void)
116 {
117 	/* Setup active state clocks */
118 	clock_active_init();
119 
120 	/* Setup sleep active clocks */
121 	clock_sleep_init();
122 
123 	/* Setup deepsleep active clocks */
124 	clock_deepsleep_init();
125 
126 	/* Setup initial wakeup sources */
127 	wakeup_src_init();
128 }
129