1# Analog Devices MAX32xxx MCU family
2
3# Copyright (c) 2023-2025 Analog Devices, Inc.
4# SPDX-License-Identifier: Apache-2.0
5
6config SOC_FAMILY_MAX32
7	select CLOCK_CONTROL
8	select BUILD_OUTPUT_HEX
9	select SOC_EARLY_INIT_HOOK
10	select HAS_SEGGER_RTT if ZEPHYR_SEGGER_MODULE
11
12config SOC_FAMILY_MAX32_M4
13	select ARM
14	select CPU_CORTEX_M4
15	select CPU_CORTEX_M_HAS_SYSTICK
16	select CPU_HAS_ARM_MPU
17	select CPU_HAS_FPU
18
19config SOC_MAX32655_M4
20	select MAX32_HAS_SECONDARY_RV32
21
22config SOC_MAX32680_M4
23	select MAX32_HAS_SECONDARY_RV32
24
25config SOC_MAX32690_M4
26	select MAX32_HAS_SECONDARY_RV32
27
28config SOC_MAX78000_M4
29	select MAX32_HAS_SECONDARY_RV32
30
31config SOC_MAX78002_M4
32	select MAX32_HAS_SECONDARY_RV32
33
34if SOC_FAMILY_MAX32
35
36config MAX32_ON_ENTER_CPU_IDLE_HOOK
37	bool "CPU idle hook enable"
38	default y
39	imply ARM_ON_ENTER_CPU_IDLE_HOOK
40	help
41	  Enables a hook (z_arm_on_enter_cpu_idle()) that is called when
42	  the CPU is made idle (by k_cpu_idle() or k_cpu_atomic_idle()).
43	  If needed, this hook can be used to prevent the CPU from actually
44	  entering sleep by skipping the WFE/WFI instruction.
45
46config MAX32_HAS_SECONDARY_RV32
47	bool
48
49config MAX32_SECONDARY_RV32
50	bool "Secondary RISC-V core enable"
51	depends on MAX32_HAS_SECONDARY_RV32
52
53DT_CHOSEN_Z_CODE_RV32_PARTITION := zephyr,code-rv32-partition
54
55config MAX32_SECONDARY_RV32_BOOT_ADDRESS
56	hex "Secondary RISC-V core boot address"
57	default $(dt_chosen_reg_addr_hex,$(DT_CHOSEN_Z_CODE_RV32_PARTITION))
58	depends on MAX32_SECONDARY_RV32
59
60endif # SOC_FAMILY_MAX32
61