1/*
2 * Copyright (c) 2024 DENX Software Engineering GmbH
3 *               Lukasz Majewski <lukma@denx.de>
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8/*
9 * imxrt1020_evk -> HOST
10 * nRF21540-DK   -> RCP (nrf/samples/openthread/coprocessor)
11 * LPUART2 used for communication:
12 *         nRF21540 (P6) P0.08 RXD -> IMXRT1020-EVK (J17) D1 (GPIO B1 08) (TXD)
13 *         nRF21540 (P6) P0.07 CTS -> IMXRT1020-EVK (J19) D8 (GPIO B1 07) (RTS)
14 *         nRF21540 (P6) P0.06 TXD -> IMXRT1020-EVK (J17) D0 (GPIO B1 09) (RXD)
15 *         nRF21540 (P6) P0.05 RTS -> IMXRT1020-EVK (J17) D7 (GPIO B1 06) (CTS)
16 */
17
18/**
19 * Overlay to enable support for OpenThread's RCP UART communication
20 * on the imxrt1020_evk board.
21 */
22
23/ {
24	chosen {
25		zephyr,hdlc-rcp-if = &hdlc_rcp_if;
26		zephyr,ot-uart = &lpuart2;
27	};
28
29	hdlc_rcp_if: hdlc_rcp_if {
30		     compatible = "uart,hdlc-rcp-if";
31	};
32};
33
34&lpuart2 {
35	status = "okay";
36	current-speed = <1000000>;
37	pinctrl-0 = <&pinmux_lpuart2_flowcontrol>;
38	pinctrl-1 = <&pinmux_lpuart2_sleep>;
39	pinctrl-names = "default", "sleep";
40	hw-flow-control;
41};
42
43/*
44 * The lpuart2's CTS pin is mapped to PHY's int-gpio or to SDRAM EMC 20.
45 * As SPINEL UART's implementation required CTS/RTS flow control -
46 * the PHY's mdio interrupt needs to be disabled.
47 */
48&phy {
49	/delete-property/ int-gpios;
50};
51
52&pinctrl {
53	pinmux_lpuart2_flowcontrol: pinmux_lpuart2_flowcontrol {
54		group0 {
55			pinmux = <&iomuxc_gpio_ad_b1_09_lpuart2_rx>,
56				<&iomuxc_gpio_ad_b1_08_lpuart2_tx>,
57				<&iomuxc_gpio_ad_b1_06_lpuart2_cts_b>,
58				<&iomuxc_gpio_ad_b1_07_lpuart2_rts_b>;
59			drive-strength = "r0-6";
60			slew-rate = "slow";
61			nxp,speed = "100-mhz";
62		};
63	};
64};
65
66/delete-node/ &{/soc/iomuxc@401f8000/pinctrl/pinmux_enet_mdio/group1};
67