1/*
2 * Copyright (c) 2024 Centro de Inovacao EDGE
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <zephyr/dt-bindings/adc/mcux-lpadc.h>
8
9/ {
10	aliases {
11		adc0 = &adc0;
12	};
13};
14
15&adc0 {
16	#address-cells = <1>;
17	#size-cells = <0>;
18
19	/*
20	 * To use this sample:
21	 * - Connect VREFN_TARGET to GND, and VREFP_TARGET to 3v3
22	 *   (Resistors J8 and J9, should be populated by default)
23	 * LPADC0 CH0A and CH0B are set up in differential mode
24	 * - Connect LPADC0 CH0A signal to voltage between 0~3.3V (P19 pin 4)
25	 * - Connect LPADC0 CH0B signal to voltage between 0~3.3V (P19 pin 2)
26	 * LPADC0 CH4A is set up in single ended mode
27	 * - Connect LPADC0 CH4A signal to voltage between 0~3.3V (P17 pin 19)
28	 * LPADC0 CH4B is set up in single ended mode
29	 * - Connect LPADC0 CH4B signal to voltage between 0~3.3V (P18 pin 1)
30	 */
31
32	/*
33	 * Channel 0 is used for differential mode, with 13 bit resolution
34	 * CH0A (plus side) is routed to P19 pin 4
35	 * CH0B (minus side) is routed to P19 pin 2
36	 */
37	channel@0 {
38		reg = <0>;
39		zephyr,gain = "ADC_GAIN_1";
40		zephyr,reference = "ADC_REF_EXTERNAL0";
41		zephyr,vref-mv = <3300>;
42		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
43		zephyr,input-positive = <MCUX_LPADC_CH0A>;
44		zephyr,input-negative = <MCUX_LPADC_CH0B>;
45	};
46
47	/*
48	 * Channel 1 is used in single ended mode, with 16 bit resolution
49	 * CH4A is routed to P17 pin 19
50	 */
51	channel@1 {
52		reg = <1>;
53		zephyr,gain = "ADC_GAIN_1";
54		zephyr,reference = "ADC_REF_EXTERNAL0";
55		zephyr,vref-mv = <3300>;
56		zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
57		zephyr,input-positive = <MCUX_LPADC_CH4A>;
58	};
59
60	/*
61	 * Channel 2 is used in single ended mode, with 12 bit resolution
62	 * CH4B is routed to P18 pin 1
63	 */
64};
65