1 /*
2 * Copyright 2024 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <zephyr/kernel.h>
8 #include <stdio.h>
9
10 #include "arm_math.h"
11
vec_sum_int16(const int16_t * in_a,const int16_t * in_b,int16_t * out,uint32_t length)12 void vec_sum_int16(const int16_t *in_a, const int16_t *in_b, int16_t *out, uint32_t length)
13 {
14 printk("[Backend] CMSIS-DSP module\n");
15 arm_add_q15(in_a, in_b, out, length);
16 }
17
vec_power_int16(const int16_t * in,int64_t * out,int rsh,uint32_t length)18 void vec_power_int16(const int16_t *in, int64_t *out, int rsh, uint32_t length)
19 {
20 printk("[Backend] CMSIS-DSP module\n");
21 arm_power_q15(in, length, out);
22 }
23
vec_power_int32(const int32_t * in,int64_t * out,int rsh,uint32_t length)24 void vec_power_int32(const int32_t *in, int64_t *out, int rsh, uint32_t length)
25 {
26 printk("[Backend] CMSIS-DSP module\n");
27 arm_power_q31(in, length, out);
28 }
29
fft_real32(int32_t * in,int32_t * out,int length)30 void fft_real32(int32_t *in, int32_t *out, int length)
31 {
32 /* Instance structure for the Q31 RFFT */
33 arm_rfft_instance_q31 rFFT;
34
35 printk("[Backend] CMSIS-DSP module\n");
36
37 /*
38 * Initialize the FFT
39 * value = 0: forward transform
40 * value = 1: enables bit reversal of output
41 */
42 arm_rfft_init_q31(&rFFT, length, 0, 1);
43 /* Apply FFT */
44 arm_rfft_q31(&rFFT, in, out);
45 }
46
real_block_iir_32(int M,const int32_t * coef_sos,const int16_t * coef_g,const int32_t * in,int32_t * out,int block_size)47 void real_block_iir_32(int M, const int32_t *coef_sos, const int16_t *coef_g,
48 const int32_t *in, int32_t *out, int block_size)
49 {
50 /* Instance of the Q31 Biquad cascade structure */
51 arm_biquad_casd_df1_inst_q31 handle;
52 /*
53 * State variables array
54 * Each Bi-quad stage has 4 state variables.
55 * The state array has a total length of 4*M values.
56 */
57 q31_t biquadStateBandQ31[4 * M];
58
59 printk("[Backend] CMSIS-DSP module\n");
60
61 /*
62 * Initialize the state and coefficient buffers for all Bi-quad sections
63 * value = 2: Shift to be applied after the accumulator
64 */
65 arm_biquad_cascade_df1_init_q31(&handle, M, coef_sos, &biquadStateBandQ31[0], 2);
66 /* Call the Q31 Bi-quad Cascade DF1 process function */
67 arm_biquad_cascade_df1_q31(&handle, in, out, block_size);
68 }
69
lms_iir_32(int32_t * err,int32_t * coef,int32_t * input,int32_t * ref,int32_t mu,int block_size,int M)70 void lms_iir_32(int32_t *err, int32_t *coef, int32_t *input, int32_t *ref,
71 int32_t mu, int block_size, int M)
72 {
73 arm_lms_instance_q31 handle;
74
75 printk("[Backend] CMSIS-DSP module\n");
76 arm_lms_init_q31(&handle, M, coef, ref, mu, block_size, 0);
77 arm_lms_q31(&handle, input, ref, coef, err, block_size);
78 }
79
