1 /*
2  * Copyright (c) 2017 Nordic Semiconductor ASA
3  * Copyright (c) 2023 Arm Limited
4  *
5  * SPDX-License-Identifier: Apache-2.0
6  */
7 
8 /**
9  * @file
10  * @brief CMSIS interface file
11  *
12  * This header contains the interface to the ARM CMSIS Core headers.
13  */
14 
15 #ifndef ZEPHYR_MODULES_CMSIS_CMSIS_M_H_
16 #define ZEPHYR_MODULES_CMSIS_CMSIS_M_H_
17 
18 #if defined(CONFIG_CMSIS_M_CHECK_DEVICE_DEFINES) && CONFIG_CMSIS_M_CHECK_DEVICE_DEFINES == 1U
19 #define __CHECK_DEVICE_DEFINES 1U
20 #endif
21 
22 #include <zephyr/arch/arm/cortex_m/nvic.h>
23 
24 #include <soc.h>
25 
26 #if __NVIC_PRIO_BITS != NUM_IRQ_PRIO_BITS
27 #error "NUM_IRQ_PRIO_BITS and __NVIC_PRIO_BITS are not set to the same value"
28 #endif
29 
30 #if __MPU_PRESENT != CONFIG_CPU_HAS_ARM_MPU
31 #error "__MPU_PRESENT and CONFIG_CPU_HAS_ARM_MPU are not set to the same value"
32 #endif
33 
34 #if __FPU_PRESENT != CONFIG_CPU_HAS_FPU
35 #error "__FPU_PRESENT and CONFIG_CPU_HAS_FPU are not set to the same value"
36 #endif
37 
38 
39 /* VTOR is only optional on armv6-m and armv8-m baseline. __VTOR_PRESENT is often
40  * left undefined on platform where it is not optional.
41  */
42 #if defined(CONFIG_ARMV6_M_ARMV8_M_BASELINE) && \
43 	(__VTOR_PRESENT != CONFIG_CPU_CORTEX_M_HAS_VTOR)
44 #error "__VTOR_PRESENT and CONFIG_CPU_CORTEX_M_HAS_VTOR are not set to the same value."
45 #endif
46 
47 /* Some platform’s sdk incorrectly define __DSP_PRESENT for Cortex-M4 & Cortex-M7
48  * DSP extension. __ARM_FEATURE_DSP is set by the compiler for these. So ignore
49  * __DSP_PRESENT discrepancy when __ARM_FEATURE_DSP is defined.
50  */
51 #if !defined(__ARM_FEATURE_DSP) && (__DSP_PRESENT != CONFIG_ARMV8_M_DSP)
52 #error "__DSP_PRESENT and CONFIG_ARMV8_M_DSP are not set to the same value"
53 #endif
54 
55 #if  defined(__ICACHE_PRESENT) && (__ICACHE_PRESENT != CONFIG_CPU_HAS_ICACHE)
56 #error "__ICACHE_PRESENT and CONFIG_CPU_HAS_ICACHE are not set to the same value"
57 #endif
58 
59 #if defined(__DCACHE_PRESENT) && (__DCACHE_PRESENT != CONFIG_CPU_HAS_DCACHE)
60 #error "__DCACHE_PRESENT and CONFIG_CPU_HAS_DCACHE are not set to the same value"
61 #endif
62 
63 #if defined(__MVE_PRESENT) && (__MVE_PRESENT != CONFIG_ARMV8_1_M_MVEI)
64 #error "__MVE_PRESENT and CONFIG_ARMV8_1_M_MVEI are not set to the same value"
65 #endif
66 
67 #if defined(__SAUREGION_PRESENT) && (__SAUREGION_PRESENT != CONFIG_CPU_HAS_ARM_SAU)
68 #error "__SAUREGION_PRESENT and CONFIG_CPU_HAS_ARM_SAU are not set to the same value"
69 #endif
70 
71 #endif /* ZEPHYR_MODULES_CMSIS_CMSIS_M_H_ */
72