1 /*
2  * Copyright (c) 2024 Nuvoton Technology Corporation.
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_RESET_NUMAKER_M2L31X_RESET_H
8 #define ZEPHYR_INCLUDE_DT_BINDINGS_RESET_NUMAKER_M2L31X_RESET_H
9 
10 /* Beginning of M2L31 BSP sys_reg.h reset module copy */
11 
12 #define LPSCC_IPRST0_LPPDMA0RST_Pos      0
13 #define LPSCC_IPRST0_LPGPIORST_Pos       1
14 #define LPSCC_IPRST0_LPSRAMRST_Pos       2
15 #define LPSCC_IPRST0_WDTRST_Pos          16
16 #define LPSCC_IPRST0_LPSPI0RST_Pos       17
17 #define LPSCC_IPRST0_LPI2C0RST_Pos       18
18 #define LPSCC_IPRST0_LPUART0RST_Pos      19
19 #define LPSCC_IPRST0_LPTMR0RST_Pos       20
20 #define LPSCC_IPRST0_LPTMR1RST_Pos       21
21 #define LPSCC_IPRST0_TTMR0RST_Pos        22
22 #define LPSCC_IPRST0_TTMR1RST_Pos        23
23 #define LPSCC_IPRST0_LPADC0RST_Pos       24
24 #define LPSCC_IPRST0_OPARST_Pos          27
25 #define SYS_IPRST0_CHIPRST_Pos           0
26 #define SYS_IPRST0_CPURST_Pos            1
27 #define SYS_IPRST0_PDMA0RST_Pos          2
28 #define SYS_IPRST0_EBIRST_Pos            3
29 #define SYS_IPRST0_USBHRST_Pos           4
30 #define SYS_IPRST0_CRCRST_Pos            7
31 #define SYS_IPRST0_CRPTRST_Pos           12
32 #define SYS_IPRST0_CANFD0RST_Pos         20
33 #define SYS_IPRST0_CANFD1RST_Pos         21
34 #define SYS_IPRST1_GPIORST_Pos           1
35 #define SYS_IPRST1_TMR0RST_Pos           2
36 #define SYS_IPRST1_TMR1RST_Pos           3
37 #define SYS_IPRST1_TMR2RST_Pos           4
38 #define SYS_IPRST1_TMR3RST_Pos           5
39 #define SYS_IPRST1_ACMP01RST_Pos         7
40 #define SYS_IPRST1_I2C0RST_Pos           8
41 #define SYS_IPRST1_I2C1RST_Pos           9
42 #define SYS_IPRST1_I2C2RST_Pos           10
43 #define SYS_IPRST1_I2C3RST_Pos           11
44 #define SYS_IPRST1_QSPI0RST_Pos          12
45 #define SYS_IPRST1_SPI0RST_Pos           13
46 #define SYS_IPRST1_SPI1RST_Pos           14
47 #define SYS_IPRST1_SPI2RST_Pos           15
48 #define SYS_IPRST1_UART0RST_Pos          16
49 #define SYS_IPRST1_UART1RST_Pos          17
50 #define SYS_IPRST1_UART2RST_Pos          18
51 #define SYS_IPRST1_UART3RST_Pos          19
52 #define SYS_IPRST1_UART4RST_Pos          20
53 #define SYS_IPRST1_UART5RST_Pos          21
54 #define SYS_IPRST1_UART6RST_Pos          22
55 #define SYS_IPRST1_UART7RST_Pos          23
56 #define SYS_IPRST1_OTGRST_Pos            26
57 #define SYS_IPRST1_USBDRST_Pos           27
58 #define SYS_IPRST1_EADC0RST_Pos          28
59 #define SYS_IPRST1_TRNGRST_Pos           31
60 #define SYS_IPRST2_SPI3RST_Pos           6
61 #define SYS_IPRST2_USCI0RST_Pos          8
62 #define SYS_IPRST2_USCI1RST_Pos          9
63 #define SYS_IPRST2_WWDTRST_Pos           11
64 #define SYS_IPRST2_DACRST_Pos            12
65 #define SYS_IPRST2_EPWM0RST_Pos          16
66 #define SYS_IPRST2_EPWM1RST_Pos          17
67 #define SYS_IPRST2_EQEI0RST_Pos          22
68 #define SYS_IPRST2_EQEI1RST_Pos          23
69 #define SYS_IPRST2_TKRST_Pos             25
70 #define SYS_IPRST2_ECAP0RST_Pos          26
71 #define SYS_IPRST2_ECAP1RST_Pos          27
72 #define SYS_IPRST3_ACMP2RST_Pos          7
73 #define SYS_IPRST3_PWM0RST_Pos           8
74 #define SYS_IPRST3_PWM1RST_Pos           9
75 #define SYS_IPRST3_UTCPD0RST_Pos         15
76 
77 /* End of M2L31 BSP sys_reg.h reset module copy */
78 
79 /* Beginning of M2L31 BSP sys.h reset module copy */
80 
81 /*---------------------------------------------------------------------
82  *  Module Reset Control Resister constant definitions.
83  *---------------------------------------------------------------------
84  */
85 
86 #define NUMAKER_PDMA0_RST       ((0UL<<24) | SYS_IPRST0_PDMA0RST_Pos)
87 #define NUMAKER_EBI_RST         ((0UL<<24) | SYS_IPRST0_EBIRST_Pos)
88 #define NUMAKER_USBH_RST        ((0UL<<24) | SYS_IPRST0_USBHRST_Pos)
89 #define NUMAKER_CRC_RST         ((0UL<<24) | SYS_IPRST0_CRCRST_Pos)
90 #define NUMAKER_CRPT_RST        ((0UL<<24) | SYS_IPRST0_CRPTRST_Pos)
91 #define NUMAKER_CANFD0_RST      ((0UL<<24) | SYS_IPRST0_CANFD0RST_Pos)
92 #define NUMAKER_CANFD1_RST      ((0UL<<24) | SYS_IPRST0_CANFD1RST_Pos)
93 
94 #define NUMAKER_GPIO_RST        ((4UL<<24) | SYS_IPRST1_GPIORST_Pos)
95 #define NUMAKER_TMR0_RST        ((4UL<<24) | SYS_IPRST1_TMR0RST_Pos)
96 #define NUMAKER_TMR1_RST        ((4UL<<24) | SYS_IPRST1_TMR1RST_Pos)
97 #define NUMAKER_TMR2_RST        ((4UL<<24) | SYS_IPRST1_TMR2RST_Pos)
98 #define NUMAKER_TMR3_RST        ((4UL<<24) | SYS_IPRST1_TMR3RST_Pos)
99 #define NUMAKER_ACMP01_RST      ((4UL<<24) | SYS_IPRST1_ACMP01RST_Pos)
100 #define NUMAKER_I2C0_RST        ((4UL<<24) | SYS_IPRST1_I2C0RST_Pos)
101 #define NUMAKER_I2C1_RST        ((4UL<<24) | SYS_IPRST1_I2C1RST_Pos)
102 #define NUMAKER_I2C2_RST        ((4UL<<24) | SYS_IPRST1_I2C2RST_Pos)
103 #define NUMAKER_I2C3_RST        ((4UL<<24) | SYS_IPRST1_I2C3RST_Pos)
104 #define NUMAKER_QSPI0_RST       ((4UL<<24) | SYS_IPRST1_QSPI0RST_Pos)
105 #define NUMAKER_SPI0_RST        ((4UL<<24) | SYS_IPRST1_SPI0RST_Pos)
106 #define NUMAKER_SPI1_RST        ((4UL<<24) | SYS_IPRST1_SPI1RST_Pos)
107 #define NUMAKER_SPI2_RST        ((4UL<<24) | SYS_IPRST1_SPI2RST_Pos)
108 #define NUMAKER_UART0_RST       ((4UL<<24) | SYS_IPRST1_UART0RST_Pos)
109 #define NUMAKER_UART1_RST       ((4UL<<24) | SYS_IPRST1_UART1RST_Pos)
110 #define NUMAKER_UART2_RST       ((4UL<<24) | SYS_IPRST1_UART2RST_Pos)
111 #define NUMAKER_UART3_RST       ((4UL<<24) | SYS_IPRST1_UART3RST_Pos)
112 #define NUMAKER_UART4_RST       ((4UL<<24) | SYS_IPRST1_UART4RST_Pos)
113 #define NUMAKER_UART5_RST       ((4UL<<24) | SYS_IPRST1_UART5RST_Pos)
114 #define NUMAKER_UART6_RST       ((4UL<<24) | SYS_IPRST1_UART6RST_Pos)
115 #define NUMAKER_UART7_RST       ((4UL<<24) | SYS_IPRST1_UART7RST_Pos)
116 #define NUMAKER_OTG_RST         ((4UL<<24) | SYS_IPRST1_OTGRST_Pos)
117 #define NUMAKER_USBD_RST        ((4UL<<24) | SYS_IPRST1_USBDRST_Pos)
118 #define NUMAKER_EADC0_RST       ((4UL<<24) | SYS_IPRST1_EADC0RST_Pos)
119 #define NUMAKER_TRNG_RST        ((4UL<<24) | SYS_IPRST1_TRNGRST_Pos)
120 
121 #define NUMAKER_SPI3_RST        ((8UL<<24) | SYS_IPRST2_SPI3RST_Pos)
122 #define NUMAKER_USCI0_RST       ((8UL<<24) | SYS_IPRST2_USCI0RST_Pos)
123 #define NUMAKER_USCI1_RST       ((8UL<<24) | SYS_IPRST2_USCI1RST_Pos)
124 #define NUMAKER_WWDT_RST        ((8UL<<24) | SYS_IPRST2_WWDTRST_Pos)
125 #define NUMAKER_DAC_RST         ((8UL<<24) | SYS_IPRST2_DACRST_Pos)
126 #define NUMAKER_EPWM0_RST       ((8UL<<24) | SYS_IPRST2_EPWM0RST_Pos)
127 #define NUMAKER_EPWM1_RST       ((8UL<<24) | SYS_IPRST2_EPWM1RST_Pos)
128 #define NUMAKER_EQEI0_RST       ((8UL<<24) | SYS_IPRST2_EQEI0RST_Pos)
129 #define NUMAKER_EQEI1_RST       ((8UL<<24) | SYS_IPRST2_EQEI1RST_Pos)
130 #define NUMAKER_TK_RST          ((8UL<<24) | SYS_IPRST2_TKRST_Pos)
131 #define NUMAKER_ECAP0_RST       ((8UL<<24) | SYS_IPRST2_ECAP0RST_Pos)
132 #define NUMAKER_ECAP1_RST       ((8UL<<24) | SYS_IPRST2_ECAP1RST_Pos)
133 
134 #define NUMAKER_ACMP2_RST       ((0x18UL<<24) | SYS_IPRST3_ACMP2RST_Pos)
135 #define NUMAKER_PWM0_RST        ((0x18UL<<24) | SYS_IPRST3_PWM0RST_Pos)
136 #define NUMAKER_PWM1_RST        ((0x18UL<<24) | SYS_IPRST3_PWM1RST_Pos)
137 #define NUMAKER_UTCPD0_RST      ((0x18UL<<24) | SYS_IPRST3_UTCPD0RST_Pos)
138 
139 #define NUMAKER_LPPDMA0_RST     ((0x80UL<<24) | LPSCC_IPRST0_LPPDMA0RST_Pos)
140 #define NUMAKER_LPGPIO_RST      ((0x80UL<<24) | LPSCC_IPRST0_LPGPIORST_Pos)
141 #define NUMAKER_LPSRAM_RST      ((0x80UL<<24) | LPSCC_IPRST0_LPSRAMRST_Pos)
142 #define NUMAKER_WDT_RST         ((0x80UL<<24) | LPSCC_IPRST0_WDTRST_Pos)
143 #define NUMAKER_LPSPI0_RST      ((0x80UL<<24) | LPSCC_IPRST0_LPSPI0RST_Pos)
144 #define NUMAKER_LPI2C0_RST      ((0x80UL<<24) | LPSCC_IPRST0_LPI2C0RST_Pos)
145 #define NUMAKER_LPUART0_RST     ((0x80UL<<24) | LPSCC_IPRST0_LPUART0RST_Pos)
146 #define NUMAKER_LPTMR0_RST      ((0x80UL<<24) | LPSCC_IPRST0_LPTMR0RST_Pos)
147 #define NUMAKER_LPTMR1_RST      ((0x80UL<<24) | LPSCC_IPRST0_LPTMR1RST_Pos)
148 #define NUMAKER_TTMR0_RST       ((0x80UL<<24) | LPSCC_IPRST0_TTMR0RST_Pos)
149 #define NUMAKER_TTMR1_RST       ((0x80UL<<24) | LPSCC_IPRST0_TTMR1RST_Pos)
150 #define NUMAKER_LPADC0_RST      ((0x80UL<<24) | LPSCC_IPRST0_LPADC0RST_Pos)
151 #define NUMAKER_OPA_RST         ((0x80UL<<24) | LPSCC_IPRST0_OPARST_Pos)
152 
153 /* End of M2L31 BSP sys.h reset module copy */
154 
155 #endif
156