1 /* 2 * Copyright (c) 2024 GARDENA GmbH 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_SI32_PINCTRL_ 8 #define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_SI32_PINCTRL_ 9 10 #define SI32_SIGNAL_USART0_TX 0 11 #define SI32_SIGNAL_USART0_RX 1 12 #define SI32_SIGNAL_USART0_RTS 2 13 #define SI32_SIGNAL_USART0_CTS 3 14 #define SI32_SIGNAL_USART0_UCLK 4 15 16 #define SI32_SIGNAL_SPI0_SCK 5 17 #define SI32_SIGNAL_SPI0_MISO 6 18 #define SI32_SIGNAL_SPI0_MOSI 7 19 #define SI32_SIGNAL_SPI0_NSS 8 20 21 #define SI32_SIGNAL_USART1_TX 9 22 #define SI32_SIGNAL_USART1_RX 10 23 #define SI32_SIGNAL_USART1_RTS 11 24 #define SI32_SIGNAL_USART1_CTS 12 25 #define SI32_SIGNAL_USART1_UCLK 13 26 27 #define SI32_SIGNAL_EPCA0_CEX0 14 28 #define SI32_SIGNAL_EPCA0_CEX1 15 29 #define SI32_SIGNAL_EPCA0_CEX2 16 30 #define SI32_SIGNAL_EPCA0_CEX3 17 31 #define SI32_SIGNAL_EPCA0_CEX4 18 32 #define SI32_SIGNAL_EPCA0_CEX4 19 33 34 #define SI32_SIGNAL_PCA0_CEX0 20 35 #define SI32_SIGNAL_PCA0_CEX1 21 36 37 #define SI32_SIGNAL_PCA1_CEX0 22 38 #define SI32_SIGNAL_PCA1_CEX1 23 39 40 #define SI32_SIGNAL_EPCA0_ECI 24 41 42 #define SI32_SIGNAL_PCA0_ECI 25 43 44 #define SI32_SIGNAL_PCA1_ECI 26 45 46 #define SI32_SIGNAL_I2S0_TX_WS 27 47 #define SI32_SIGNAL_I2S0_TX_SCK 28 48 #define SI32_SIGNAL_I2S0_TX_SD 29 49 50 #define SI32_SIGNAL_I2C0_SDA 30 51 #define SI32_SIGNAL_I2C0_SCL 31 52 53 #define SI32_SIGNAL_CMP0S 32 54 #define SI32_SIGNAL_CMP0A 33 55 56 #define SI32_SIGNAL_CMP1S 34 57 #define SI32_SIGNAL_CMP1A 35 58 59 #define SI32_SIGNAL_TIMER0_CT 36 60 #define SI32_SIGNAL_TIMER0_EX 37 61 62 #define SI32_SIGNAL_TIMER1_CT 38 63 #define SI32_SIGNAL_TIMER1_EX 39 64 65 #define SI32_SIGNAL_UART0_TX 40 66 #define SI32_SIGNAL_UART0_RX 41 67 #define SI32_SIGNAL_UART0_RTS 42 68 #define SI32_SIGNAL_UART0_CTS 43 69 70 #define SI32_SIGNAL_UART1_TX 44 71 #define SI32_SIGNAL_UART1_RX 45 72 73 #define SI32_SIGNAL_SPI1_SCK 46 74 #define SI32_SIGNAL_SPI1_MISO 47 75 #define SI32_SIGNAL_SPI1_MOSI 48 76 #define SI32_SIGNAL_SPI1_NSS 49 77 78 #define SI32_SIGNAL_SPI2_SCK 50 79 #define SI32_SIGNAL_SPI2_MISO 51 80 #define SI32_SIGNAL_SPI2_MOSI 52 81 #define SI32_SIGNAL_SPI2_NSS 53 82 83 #define SI32_SIGNAL_AHB_OUT 54 84 85 #define SI32_SIGNAL_SSG0_EX0 55 86 #define SI32_SIGNAL_SSG0_EX1 56 87 #define SI32_SIGNAL_SSG0_EX2 57 88 #define SI32_SIGNAL_SSG0_EX3 58 89 90 #define SI32_SIGNAL_RTC0_OUT 59 91 92 #define SI32_SIGNAL_I2S0_RX_WS 60 93 #define SI32_SIGNAL_I2S0_RX_SCK 61 94 #define SI32_SIGNAL_I2S0_RX_SD 62 95 96 #define SI32_SIGNAL_LPTIMER0_OUT 63 97 98 #define SI32_SIGNAL_I2C1_SDA 64 99 #define SI32_SIGNAL_I2C1_SCL 65 100 101 #define SI32_SIGNAL_PB_HDKILL 66 102 103 /** 104 * @brief Specify MUX field 105 * 106 * @param fun Function name 107 * @param port Port number (0 to 4) 108 * @param pin Port pin number (0 to 15) 109 */ 110 #define SI32_MUX(fun, port, pin) \ 111 ((((port)&0x7)) | (((pin)&0xF) << 3) | ((SI32_SIGNAL_##fun & 0x7F) << 22)) 112 113 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_SI32_PINCTRL_ */ 114
