1 /*
2  * Copyright 2023 NXP
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NXP_S32K344_CLOCK_H_
8 #define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NXP_S32K344_CLOCK_H_
9 
10 #define NXP_S32_FIRC_CLK                           1U
11 #define NXP_S32_FIRC_STANDBY_CLK                   2U
12 #define NXP_S32_SIRC_CLK                           3U
13 #define NXP_S32_SIRC_STANDBY_CLK                   4U
14 #define NXP_S32_FXOSC_CLK                          5U
15 #define NXP_S32_SXOSC_CLK                          6U
16 #define NXP_S32_PLL_CLK                            7U
17 #define NXP_S32_PLL_POSTDIV_CLK                    8U
18 #define NXP_S32_PLL_PHI0_CLK                       9U
19 #define NXP_S32_PLL_PHI1_CLK                       10U
20 #define NXP_S32_EMAC_MII_RX_CLK                    11U
21 #define NXP_S32_EMAC_MII_RMII_TX_CLK               12U
22 #define NXP_S32_SCS_CLK                            13U
23 #define NXP_S32_CORE_CLK                           14U
24 #define NXP_S32_AIPS_PLAT_CLK                      15U
25 #define NXP_S32_AIPS_SLOW_CLK                      16U
26 #define NXP_S32_HSE_CLK                            17U
27 #define NXP_S32_DCM_CLK                            18U
28 #define NXP_S32_LBIST_CLK                          19U
29 #define NXP_S32_QSPI_MEM_CLK                       20U
30 #define NXP_S32_CLKOUT_RUN_CLK                     21U
31 #define NXP_S32_ADC0_CLK                           23U
32 #define NXP_S32_ADC1_CLK                           24U
33 #define NXP_S32_ADC2_CLK                           25U
34 #define NXP_S32_BCTU0_CLK                          26U
35 #define NXP_S32_CLKOUT_STANDBY_CLK                 27U
36 #define NXP_S32_CMP0_CLK                           28U
37 #define NXP_S32_CMP1_CLK                           29U
38 #define NXP_S32_CMP2_CLK                           30U
39 #define NXP_S32_CRC0_CLK                           31U
40 #define NXP_S32_DCM0_CLK                           32U
41 #define NXP_S32_DMAMUX0_CLK                        33U
42 #define NXP_S32_DMAMUX1_CLK                        34U
43 #define NXP_S32_EDMA0_CLK                          35U
44 #define NXP_S32_EDMA0_TCD0_CLK                     36U
45 #define NXP_S32_EDMA0_TCD1_CLK                     37U
46 #define NXP_S32_EDMA0_TCD2_CLK                     38U
47 #define NXP_S32_EDMA0_TCD3_CLK                     39U
48 #define NXP_S32_EDMA0_TCD4_CLK                     40U
49 #define NXP_S32_EDMA0_TCD5_CLK                     41U
50 #define NXP_S32_EDMA0_TCD6_CLK                     42U
51 #define NXP_S32_EDMA0_TCD7_CLK                     43U
52 #define NXP_S32_EDMA0_TCD8_CLK                     44U
53 #define NXP_S32_EDMA0_TCD9_CLK                     45U
54 #define NXP_S32_EDMA0_TCD10_CLK                    46U
55 #define NXP_S32_EDMA0_TCD11_CLK                    47U
56 #define NXP_S32_EDMA0_TCD12_CLK                    48U
57 #define NXP_S32_EDMA0_TCD13_CLK                    49U
58 #define NXP_S32_EDMA0_TCD14_CLK                    50U
59 #define NXP_S32_EDMA0_TCD15_CLK                    51U
60 #define NXP_S32_EDMA0_TCD16_CLK                    52U
61 #define NXP_S32_EDMA0_TCD17_CLK                    53U
62 #define NXP_S32_EDMA0_TCD18_CLK                    54U
63 #define NXP_S32_EDMA0_TCD19_CLK                    55U
64 #define NXP_S32_EDMA0_TCD20_CLK                    56U
65 #define NXP_S32_EDMA0_TCD21_CLK                    57U
66 #define NXP_S32_EDMA0_TCD22_CLK                    58U
67 #define NXP_S32_EDMA0_TCD23_CLK                    59U
68 #define NXP_S32_EDMA0_TCD24_CLK                    60U
69 #define NXP_S32_EDMA0_TCD25_CLK                    61U
70 #define NXP_S32_EDMA0_TCD26_CLK                    62U
71 #define NXP_S32_EDMA0_TCD27_CLK                    63U
72 #define NXP_S32_EDMA0_TCD28_CLK                    64U
73 #define NXP_S32_EDMA0_TCD29_CLK                    65U
74 #define NXP_S32_EDMA0_TCD30_CLK                    66U
75 #define NXP_S32_EDMA0_TCD31_CLK                    67U
76 #define NXP_S32_EIM_CLK                            68U
77 #define NXP_S32_EMAC_RX_CLK                        69U
78 #define NXP_S32_EMAC0_RX_CLK                       70U
79 #define NXP_S32_EMAC_TS_CLK                        71U
80 #define NXP_S32_EMAC0_TS_CLK                       72U
81 #define NXP_S32_EMAC_TX_CLK                        73U
82 #define NXP_S32_EMAC0_TX_CLK                       74U
83 #define NXP_S32_EMIOS0_CLK                         75U
84 #define NXP_S32_EMIOS1_CLK                         76U
85 #define NXP_S32_EMIOS2_CLK                         77U
86 #define NXP_S32_ERM0_CLK                           78U
87 #define NXP_S32_FLEXCANA_CLK                       79U
88 #define NXP_S32_FLEXCAN0_CLK                       80U
89 #define NXP_S32_FLEXCAN1_CLK                       81U
90 #define NXP_S32_FLEXCAN2_CLK                       82U
91 #define NXP_S32_FLEXCANB_CLK                       83U
92 #define NXP_S32_FLEXCAN3_CLK                       84U
93 #define NXP_S32_FLEXCAN4_CLK                       85U
94 #define NXP_S32_FLEXCAN5_CLK                       86U
95 #define NXP_S32_FLEXIO0_CLK                        87U
96 #define NXP_S32_INTM_CLK                           88U
97 #define NXP_S32_LCU0_CLK                           89U
98 #define NXP_S32_LCU1_CLK                           90U
99 #define NXP_S32_LPI2C0_CLK                         91U
100 #define NXP_S32_LPI2C1_CLK                         92U
101 #define NXP_S32_LPSPI0_CLK                         93U
102 #define NXP_S32_LPSPI1_CLK                         94U
103 #define NXP_S32_LPSPI2_CLK                         95U
104 #define NXP_S32_LPSPI3_CLK                         96U
105 #define NXP_S32_LPSPI4_CLK                         97U
106 #define NXP_S32_LPSPI5_CLK                         98U
107 #define NXP_S32_LPUART0_CLK                        99U
108 #define NXP_S32_LPUART1_CLK                        100U
109 #define NXP_S32_LPUART2_CLK                        101U
110 #define NXP_S32_LPUART3_CLK                        102U
111 #define NXP_S32_LPUART4_CLK                        103U
112 #define NXP_S32_LPUART5_CLK                        104U
113 #define NXP_S32_LPUART6_CLK                        105U
114 #define NXP_S32_LPUART7_CLK                        106U
115 #define NXP_S32_LPUART8_CLK                        107U
116 #define NXP_S32_LPUART9_CLK                        108U
117 #define NXP_S32_LPUART10_CLK                       109U
118 #define NXP_S32_LPUART11_CLK                       110U
119 #define NXP_S32_LPUART12_CLK                       111U
120 #define NXP_S32_LPUART13_CLK                       112U
121 #define NXP_S32_LPUART14_CLK                       113U
122 #define NXP_S32_LPUART15_CLK                       114U
123 #define NXP_S32_MSCM_CLK                           115U
124 #define NXP_S32_MU2A_CLK                           116U
125 #define NXP_S32_MU2B_CLK                           117U
126 #define NXP_S32_PIT0_CLK                           118U
127 #define NXP_S32_PIT1_CLK                           119U
128 #define NXP_S32_PIT2_CLK                           120U
129 #define NXP_S32_QSPI0_CLK                          121U
130 #define NXP_S32_QSPI0_RAM_CLK                      122U
131 #define NXP_S32_QSPI0_TX_MEM_CLK                   123U
132 #define NXP_S32_QSPI_SFCK_CLK                      124U
133 #define NXP_S32_RTC_CLK                            125U
134 #define NXP_S32_RTC0_CLK                           126U
135 #define NXP_S32_SAI0_CLK                           127U
136 #define NXP_S32_SAI1_CLK                           128U
137 #define NXP_S32_SEMA42_CLK                         129U
138 #define NXP_S32_SIUL2_CLK                          130U
139 #define NXP_S32_STCU0_CLK                          131U
140 #define NXP_S32_STMA_CLK                           132U
141 #define NXP_S32_STM0_CLK                           133U
142 #define NXP_S32_STMB_CLK                           134U
143 #define NXP_S32_STM1_CLK                           135U
144 #define NXP_S32_SWT0_CLK                           136U
145 #define NXP_S32_TEMPSENSE_CLK                      137U
146 #define NXP_S32_TRACE_CLK                          138U
147 #define NXP_S32_TRGMUX0_CLK                        139U
148 #define NXP_S32_TSENSE0_CLK                        140U
149 #define NXP_S32_WKPU0_CLK                          141U
150 
151 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NXP_S32K344_CLOCK_H_ */
152