1 /*
2  * Copyright (c) 2021 Intel Corporation
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #ifndef ZEPHYR_INCLUDE_ARCH_XTENSA_THREAD_H_
8 #define ZEPHYR_INCLUDE_ARCH_XTENSA_THREAD_H_
9 
10 #include <stdint.h>
11 #ifndef _ASMLANGUAGE
12 
13 #ifdef CONFIG_XTENSA_MPU
14 #include <zephyr/arch/xtensa/mpu.h>
15 #endif
16 
17 /* Xtensa doesn't use these structs, but Zephyr core requires they be
18  * defined so they can be included in struct _thread_base.  Dummy
19  * field exists for sizeof compatibility with C++.
20  */
21 
22 struct _callee_saved {
23 	char dummy;
24 };
25 
26 typedef struct _callee_saved _callee_saved_t;
27 
28 struct _thread_arch {
29 	uint32_t last_cpu;
30 #ifdef CONFIG_USERSPACE
31 
32 #ifdef CONFIG_XTENSA_MMU
33 	uint32_t *ptables;
34 #endif
35 
36 #ifdef CONFIG_XTENSA_MPU
37 	/* Pointer to the memory domain's MPU map. */
38 	struct xtensa_mpu_map *mpu_map;
39 #endif
40 
41 	/* Initial privilege mode stack pointer when doing a system call.
42 	 * Un-set for surpervisor threads.
43 	 */
44 	uint8_t *psp;
45 #endif
46 };
47 
48 typedef struct _thread_arch _thread_arch_t;
49 
50 #endif /* _ASMLANGUAGE */
51 
52 #endif /* ZEPHYR_INCLUDE_ARCH_XTENSA_THREAD_H_ */
53