1 /* 2 * Copyright (c) 2015, Wind River Systems, Inc. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 /* Implementation of sys_io.h's documented functions */ 8 9 #ifndef ZEPHYR_INCLUDE_ARCH_X86_IA32_SYS_IO_H_ 10 #define ZEPHYR_INCLUDE_ARCH_X86_IA32_SYS_IO_H_ 11 12 #if !defined(_ASMLANGUAGE) 13 14 #include <zephyr/sys/sys_io.h> 15 #include <zephyr/types.h> 16 #include <stddef.h> 17 18 static ALWAYS_INLINE sys_io_set_bit(io_port_t port,unsigned int bit)19 void sys_io_set_bit(io_port_t port, unsigned int bit) 20 { 21 uint32_t reg = 0; 22 23 __asm__ volatile("inl %w1, %0;\n\t" 24 "btsl %2, %0;\n\t" 25 "outl %0, %w1;\n\t" 26 : 27 : "a" (reg), "Nd" (port), "Ir" (bit)); 28 } 29 30 static ALWAYS_INLINE sys_io_clear_bit(io_port_t port,unsigned int bit)31 void sys_io_clear_bit(io_port_t port, unsigned int bit) 32 { 33 uint32_t reg = 0; 34 35 __asm__ volatile("inl %w1, %0;\n\t" 36 "btrl %2, %0;\n\t" 37 "outl %0, %w1;\n\t" 38 : 39 : "a" (reg), "Nd" (port), "Ir" (bit)); 40 } 41 42 static ALWAYS_INLINE sys_io_test_bit(io_port_t port,unsigned int bit)43 int sys_io_test_bit(io_port_t port, unsigned int bit) 44 { 45 uint32_t ret; 46 47 __asm__ volatile("inl %w1, %0\n\t" 48 "btl %2, %0\n\t" 49 : "=a" (ret) 50 : "Nd" (port), "Ir" (bit)); 51 52 return (ret & 1U); 53 } 54 55 static ALWAYS_INLINE sys_io_test_and_set_bit(io_port_t port,unsigned int bit)56 int sys_io_test_and_set_bit(io_port_t port, unsigned int bit) 57 { 58 int ret; 59 60 ret = sys_io_test_bit(port, bit); 61 sys_io_set_bit(port, bit); 62 63 return ret; 64 } 65 66 static ALWAYS_INLINE sys_io_test_and_clear_bit(io_port_t port,unsigned int bit)67 int sys_io_test_and_clear_bit(io_port_t port, unsigned int bit) 68 { 69 int ret; 70 71 ret = sys_io_test_bit(port, bit); 72 sys_io_clear_bit(port, bit); 73 74 return ret; 75 } 76 77 #endif /* _ASMLANGUAGE */ 78 79 #endif /* ZEPHYR_INCLUDE_ARCH_X86_IA32_SYS_IO_H_ */ 80
