1/* 2 * Copyright (c) 2024 ITE Corporation. All Rights Reserved. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7#include <ite/it8801-mfd-map.dtsi> 8 9&it8801_mfd { 10 #address-cells = <1>; 11 #size-cells = <1>; 12 13 /* GPIO */ 14 ioex_it8801_port0: it8801_port@0 { 15 compatible = "ite,it8801-gpio"; 16 reg = <0x00 1 /* GPIPSR */ 17 0x05 1 /* GPSOVR */ 18 0x0a 8 /* GPCR */ 19 0x32 1 /* GPISR */ 20 0x37 1>; /* GPIER */ 21 gpio-controller; 22 #gpio-cells = <2>; 23 ngpios = <8>; 24 pin-mask = <0xdb>; 25 }; 26 27 ioex_it8801_port1: it8801_port@1 { 28 compatible = "ite,it8801-gpio"; 29 reg = <0x01 1 /* GPIPSR */ 30 0x06 1 /* GPSOVR */ 31 0x12 6 /* GPCR */ 32 0x33 1 /* GPISR */ 33 0x38 1>; /* GPIER */ 34 gpio-controller; 35 #gpio-cells = <2>; 36 ngpios = <6>; 37 pin-mask = <0x3f>; 38 }; 39 40 ioex_it8801_port2: it8801_port@2 { 41 compatible = "ite,it8801-gpio"; 42 reg = <0x02 1 /* GPIPSR */ 43 0x07 1 /* GPSOVR */ 44 0x1a 4 /* GPCR */ 45 0x34 1 /* GPISR */ 46 0x39 1>; /* GPIER */ 47 gpio-controller; 48 #gpio-cells = <2>; 49 ngpios = <4>; 50 pin-mask = <0x0f>; 51 }; 52 53 /* KBD */ 54 ioex_it8801_kbd: it8801_kbd@40 { 55 compatible = "ite,it8801-kbd"; 56 status = "disabled"; 57 reg = <0x40 1 58 0x41 1 59 0x42 1 60 0x43 1>; 61 row-size = <8>; 62 col-size = <13>; 63 }; 64 65 /* PWM */ 66 ioex_it8801_pwm1: it8801_pwm@60 { 67 compatible = "ite,it8801-pwm"; 68 status = "disabled"; 69 reg = <0x60 1 /* PWMMCR */ 70 0x64 1 /* PWMDCR */ 71 0x66 1 /* PWMPRSL */ 72 0x67 1>; /* PWMPRSM */ 73 mfdctrl = <&pwm1_gp12_default>; 74 channel = <1>; 75 #pwm-cells = <3>; 76 }; 77 78 ioex_it8801_pwm2: it8801_pwm@68 { 79 compatible = "ite,it8801-pwm"; 80 status = "disabled"; 81 reg = <0x68 1 /* PWMMCR */ 82 0x6c 1 /* PWMDCR */ 83 0x6e 1 /* PWMPRSL */ 84 0x6f 1>; /* PWMPRSM */ 85 mfdctrl = <&pwm2_gp13_default>; 86 channel = <2>; 87 #pwm-cells = <3>; 88 }; 89 90 ioex_it8801_pwm3: it8801_pwm@70 { 91 compatible = "ite,it8801-pwm"; 92 status = "disabled"; 93 reg = <0x70 1 /* PWMMCR */ 94 0x74 1 /* PWMDCR */ 95 0x76 1 /* PWMPRSL */ 96 0x77 1>; /* PWMPRSM */ 97 mfdctrl = <&pwm3_gp14_default>; 98 channel = <3>; 99 #pwm-cells = <3>; 100 }; 101 102 ioex_it8801_pwm4: it8801_pwm@78 { 103 compatible = "ite,it8801-pwm"; 104 status = "disabled"; 105 reg = <0x78 1 /* PWMMCR */ 106 0x7c 1 /* PWMDCR */ 107 0x7e 1 /* PWMPRSL */ 108 0x7f 1>; /* PWMPRSM */ 109 mfdctrl = <&pwm4_gp15_default>; 110 channel = <4>; 111 #pwm-cells = <3>; 112 }; 113 114 ioex_it8801_pwm7: it8801_pwm@90 { 115 compatible = "ite,it8801-pwm"; 116 status = "disabled"; 117 reg = <0x90 1 /* PWMMCR */ 118 0x94 1 /* PWMDCR */ 119 0x96 1 /* PWMPRSL */ 120 0x97 1>; /* PWMPRSM */ 121 mfdctrl = <&pwm7_gp20_default>; 122 channel = <7>; 123 #pwm-cells = <3>; 124 125 }; 126 127 ioex_it8801_pwm8: it8801_pwm@98 { 128 compatible = "ite,it8801-pwm"; 129 status = "disabled"; 130 reg = <0x98 1 /* PWMMCR */ 131 0x9c 1 /* PWMDCR */ 132 0x9e 1 /* PWMPRSL */ 133 0x9f 1>; /* PWMPRSM */ 134 mfdctrl = <&pwm8_gp23_default>; 135 channel = <8>; 136 #pwm-cells = <3>; 137 }; 138 139 ioex_it8801_pwm9: it8801_pwm@a0 { 140 compatible = "ite,it8801-pwm"; 141 status = "disabled"; 142 reg = <0xa0 1 /* PWMMCR */ 143 0xa4 1 /* PWMDCR */ 144 0xa6 1 /* PWMPRSL */ 145 0xa7 1>; /* PWMPRSM */ 146 mfdctrl = <&pwm9_gp22_default>; 147 channel = <9>; 148 #pwm-cells = <3>; 149 }; 150}; 151