1# Copyright (c) 2020 Linaro Limited
2# SPDX-License-Identifier: Apache-2.0
3
4description: |
5    STM32 Pin controller.
6
7    Based on pincfg-node.yaml binding.
8
9    Note: `bias-disable` and `drive-push-pull` are default pin configurations.
10           They will be applied in case no `bias-foo` or `driver-bar` properties
11           are set.
12
13compatible: "st,stm32-pinctrl"
14
15include: base.yaml
16
17properties:
18  reg:
19    required: true
20
21  remap-pa11:
22    type: boolean
23    description: Remaps the PA11 pin to operate as PA9 pin.
24      Use of this property is restricted to STM32G0 and STM32C0 SoCs.
25
26  remap-pa12:
27    type: boolean
28    description: Remaps the PA12 pin to operate as PA10 pin.
29      Use of this property is restricted to STM32G0 and STM32C0 SoCs.
30
31  remap-pa11-pa12:
32    type: boolean
33    description: Remaps the PA11/PA12 pin to operate as PA9/PA10 pin.
34      Use of this property is restricted to STM32F070x SoCs.
35
36child-binding:
37  description: |
38      This binding gives a base representation of the STM32 pins configuration
39
40  include:
41    - name: pincfg-node.yaml
42      property-allowlist:
43        - bias-disable
44        - bias-pull-down
45        - bias-pull-up
46        - drive-push-pull
47        - drive-open-drain
48        - output-low
49        - output-high
50
51  properties:
52    pinmux:
53      required: true
54      type: int
55      description: |
56        Reused from
57        https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml
58        Integer represents gpio pin number and mux setting.
59        Each integer encodes a port, line and alternate function.
60        With:
61        - port: The gpio port index (PA = 0, PB = 1, ..., PK = 11)
62        - line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
63        - function: The function number, can be:
64        * 0 : Alternate Function 0
65        * 1 : Alternate Function 1
66        * 2 : Alternate Function 2
67        * ...
68        * 15 : Alternate Function 15
69        * 16 : Analog
70        * 17 : GPIO
71        In case selected pin function is GPIO, pin is statically configured as
72        a plain input/output GPIO. Default configuration is input. Output value
73        can be configured by adding 'ouptut-low' or 'output-high' properties
74        to the pin configuration.
75
76        To simplify the usage, macro is available to generate "pinmux" field.
77        This macro is available here:
78          -include/zephyr/dt-bindings/pinctrl/stm32-pinctrl.h
79        Some examples of macro usage:
80           GPIO A9 set as alternate function 2
81        ... {
82                 pinmux = <STM32_PINMUX('A', 9, AF2)>;
83        };
84           GPIO A9 set as analog
85        ... {
86                 pinmux = <STM32_PINMUX('A', 9, ANALOG)>;
87        };
88           GPIO A9 set as GPIO output high
89        ... {
90                 pinmux = <STM32_PINMUX('A', 9, GPIO)>;
91                 output-high;
92        };
93
94    slew-rate:
95      type: string
96      default: "low-speed"
97      enum:
98        - "low-speed"           # Default value.
99        - "medium-speed"
100        - "high-speed"
101        - "very-high-speed"
102      description: |
103        Pin speed. Default to low-speed. For few pins (PA11 and
104        PB3 depending on SoCs)hardware reset value could differ
105        (very-high-speed). Carefully check reference manual for these pins.
106