1# Copyright (c) 2020 Linaro Limited
2# SPDX-License-Identifier: Apache-2.0
3
4description: |
5    STM32 Pin controller Node
6    Based on pincfg-node.yaml binding.
7
8    Note: `bias-disable` and `drive-push-pull` are default pin configurations.
9           They will be applied in case no `bias-foo` or `driver-bar` properties
10           are set.
11
12compatible: "st,stm32-pinctrl"
13
14include: base.yaml
15
16properties:
17  reg:
18    required: true
19
20  remap-pa11:
21    type: boolean
22    description: Remaps the PA11 pin to operate as PA9 pin.
23      Use of this property is restricted to STM32G0 and STM32C0 SoCs.
24
25  remap-pa12:
26    type: boolean
27    description: Remaps the PA12 pin to operate as PA10 pin.
28      Use of this property is restricted to STM32G0 and STM32C0 SoCs.
29
30  remap-pa11-pa12:
31    type: boolean
32    description: Remaps the PA11/PA12 pin to operate as PA9/PA10 pin.
33      Use of this property is restricted to STM32F070x SoCs.
34
35child-binding:
36  description: |
37      This binding gives a base representation of the STM32 pins configuration
38
39  include:
40    - name: pincfg-node.yaml
41      property-allowlist:
42        - bias-disable
43        - bias-pull-down
44        - bias-pull-up
45        - drive-push-pull
46        - drive-open-drain
47        - output-low
48        - output-high
49
50  properties:
51    pinmux:
52      required: true
53      type: int
54      description: |
55        Reused from
56        https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml
57        Integer array, represents gpio pin number and mux setting.
58        These defines are calculated as: ((port * 16 + line) << 8) | function
59        With:
60        - port: The gpio port index (PA = 0, PB = 1, ..., PK = 11)
61        - line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
62        - function: The function number, can be:
63        * 0 : Alternate Function 0
64        * 1 : Alternate Function 1
65        * 2 : Alternate Function 2
66        * ...
67        * 15 : Alternate Function 15
68        * 16 : Analog
69        * 17 : GPIO
70        In case selected pin function is GPIO, pin is statically configured as
71        a plain input/output GPIO. Default configuration is input. Output value
72        can be configured by adding 'ouptut-low' or 'output-high' properties
73        to the pin configuration.
74
75        To simplify the usage, macro is available to generate "pinmux" field.
76        This macro is available here:
77          -include/zephyr/dt-bindings/pinctrl/stm32-pinctrl-common.h
78        Some examples of macro usage:
79           GPIO A9 set as alternate function 2
80        ... {
81                 pinmux = <STM32_PINMUX('A', 9, AF2)>;
82        };
83           GPIO A9 set as analog
84        ... {
85                 pinmux = <STM32_PINMUX('A', 9, ANALOG)>;
86        };
87           GPIO A9 set as GPIO output high
88        ... {
89                 pinmux = <STM32_PINMUX('A', 9, GPIO)>;
90                 output-high;
91        };
92
93    slew-rate:
94      type: string
95      default: "low-speed"
96      enum:
97        - "low-speed"           # Default value.
98        - "medium-speed"
99        - "high-speed"
100        - "very-high-speed"
101      description: |
102        Pin speed. Default to low-speed. For few pins (PA11 and
103        PB3 depending on SoCs)hardware reset value could differ
104        (very-high-speed). Carefully check reference manual for these pins.
105