1# Copyright 2024 NXP
2# SPDX-License-Identifier: Apache-2.0
3
4description: Use this compatible for the i.MX8ULP boards
5
6compatible: "nxp,imx8ulp-pinctrl"
7
8include: base.yaml
9
10child-binding:
11  description: i.MX8ULP pin controller pin group
12  child-binding:
13    description: i.MX8ULP pin controller pin configuration node
14    include:
15      - name: pincfg-node.yaml
16        property-allowlist:
17          - bias-pull-up
18          - bias-pull-down
19          - drive-open-drain
20    properties:
21      pinmux:
22        required: true
23        type: phandles
24      drive-strength:
25        type: string
26        description: |
27          Used to configure the pad's drive strength, which, together
28          with the slew rate, affects the maximum frequency the pad's
29          output buffer can yield. If "normal" drive strength is used,
30          the maximum frequency will be lower as per the measurements
31          found in the SoC datasheet. Note that the TRM refers to the
32          "normal" drive strength as "standard". If unspecified, the
33          default will be "normal".
34        enum:
35          - "normal"
36          - "high"
37      slew-rate:
38        type: string
39        description: |
40          Used to configure the pad's slew rate, which affects the
41          maximum frequency the pad's output buffer can yield (
42          "fast" slew rate -> higher pad frequency, "slow" slew rate ->
43          lower pad frequency). Note that the TRM refers to the "fast"
44          slew rate as "standard". If unspecified, the default will be
45          "fast".
46        enum:
47          - "fast"
48          - "slow"
49