1# Copyright (c) 2023-2024 Analog Devices, Inc. 2# SPDX-License-Identifier: Apache-2.0 3 4description: | 5 MAX32 Pin controller Node 6 Based on pincfg-node.yaml binding. 7 8 Note: `bias-disable` are default pin configurations. 9 10compatible: "adi,max32-pinctrl" 11 12include: base.yaml 13 14properties: 15 reg: 16 required: true 17 18 19child-binding: 20 description: | 21 Base binding configuration for ADI MAX32xxx MCUs 22 23 include: 24 - name: pincfg-node.yaml 25 property-allowlist: 26 - bias-disable 27 - bias-pull-down 28 - bias-pull-up 29 - output-low 30 - output-high 31 - input-enable 32 - output-enable 33 - power-source 34 - drive-strength 35 36 properties: 37 pinmux: 38 required: true 39 type: int 40 description: | 41 Integer array, represents gpio pin number and mux setting. 42 These defines are calculated as: (pin<<8 | port<<4 | function<<0) 43 With: 44 - port: The gpio port index (0, 1, ...) 45 - pin: The pin offset within the port (0, 1, 2, ...) 46 - function: The function number, can be: 47 * 0 : GPIO 48 * 1 : Alternate Function 1 49 * 2 : Alternate Function 2 50 * 3 : Alternate Function 3 51 * 4 : Alternate Function 4 52 In case selected pin function is GPIO, pin is statically configured as 53 a plain input/output GPIO. Default configuration is input. Output value 54 can be configured by adding 'ouptut-low' or 'output-high' properties 55 to the pin configuration. 56 57 To simplify the usage, macro is available to generate "pinmux" field. 58 This macro is available here: 59 -include/zephyr/dt-bindings/pinctrl/max32-pinctrl.h 60 Some examples of macro usage: 61 P0.9 set as alernate function 1 62 { 63 pinmux = <MAX32_PINMUX(0, 9, AF1)>; 64 }; 65 P0.9 set as alernate function 2 66 { 67 pinmux = <MAX32_PINMUX(0, 9, AF2)>; 68 }; 69 P0.9 set as GPIO output high 70 { 71 pinmux = <MAX32_PINMUX(0, 9, GPIO)>; 72 output-high; 73 }; 74 power-source: 75 enum: [0, 1] 76 description: | 77 GPIO Supply Voltage Select, Selects the voltage rail used for the pin. 78 0 or MAX32_VSEL_VDDIO 79 1 or MAX32_VSEL_VDDIOH 80 drive-strength: 81 default: 0 82 enum: [0, 1, 2, 3] 83 description: | 84 There are 4 drive strength mode. 85 Mode 0: 1mA 86 Mode 1: 2mA 87 Mode 2: 4mA 88 Mode 3: 8mA 89 Default GPIO output drive strength is mode 0 for MAX32 MCUs. 90 For more information please take a look device user guide, datasheet. 91