1# Copyright (c) 2024 Marcin Niestroj
2# Copyright (c) 2024 Meta
3# SPDX-License-Identifier: Apache-2.0
4
5description: |
6    This binding is to be used by the STM32U5xx transceivers which are built-in
7    with USB HS PHY IP and a configurable HSE clock source.
8
9compatible: "st,stm32u5-otghs-phy"
10
11include: phy-controller.yaml
12
13properties:
14  "#phy-cells":
15    const: 0
16
17  clocks:
18    required: true
19    description: |
20      Supported configurations:
21
22        /* HSE */
23        clocks = <&rcc STM32_CLOCK(AHB2, 15U)>,
24                 <&rcc STM32_SRC_HSE OTGHS_SEL(0)>;
25
26        /* HSE/2 */
27        clocks = <&rcc STM32_CLOCK(AHB2, 15U)>,
28                 <&rcc (STM32_SRC_HSE | STM32_CLOCK_DIV(2)) OTGHS_SEL(2)>;
29
30        /* PLL1_P_CK */
31        clocks = <&rcc STM32_CLOCK(AHB2, 15U)>,
32                 <&rcc STM32_SRC_PLL1_P OTGHS_SEL(1)>;
33
34        /* PLL1_P_CK/2 */
35        clocks = <&rcc STM32_CLOCK(AHB2, 15U)>,
36                 <&rcc (STM32_SRC_PLL1_P | STM32_CLOCK_DIV(2)) OTGHS_SEL(3)>;
37