1# Copyright (c) 2022 STMicroelectronics
2# SPDX-License-Identifier: Apache-2.0
3
4description: |
5    STM32 OSPI Controller.
6
7    Enabling a stm32 octospi node in a board description would typically requires this:
8
9        &octospi {
10            pinctrl-0 = <&octospi_clk_pe9 &octospi_ncs_pe10 &octospi_dqs_pe11
11                         &octospi_io0_pe12 &octospi_io1_pe13
12                         &octospi_io2_pe14 &octospi_io3_pe15
13                         &octospi_io4_pe16 &octospi_io5_pe17
14                         &octospi_io6_pe18 &octospi_io7_pe19>;
15
16            dmas = <&dma1 5 41 0x10000>;
17            dma-names = "tx_rx";
18
19            status = "okay";
20        };
21
22compatible: "st,stm32-ospi"
23
24include: [base.yaml, pinctrl-device.yaml]
25
26bus: ospi
27
28properties:
29  reg:
30    required: true
31
32  interrupts:
33    required: true
34
35  pinctrl-0:
36    required: true
37
38  pinctrl-names:
39    required: true
40
41  clock-names:
42    required: true
43
44  dmas:
45    description: |
46      Optional DMA channel specifier, required for DMA transactions.
47      For example dmas for TX/RX on OSPI
48         dmas = <&dma1 5 41 0x10000>;
49
50      With, in each cell of the dmas specifier:
51      - &dma1: dma controller phandle
52      - 5: channel number (0 to Max-Channel minus 1). From 0 to 15 on stm32u5x.
53      - 41: slot number (request which could be given by the DMAMUX)
54      - 0x10000: channel configuration (only for srce/dest data size, priority)
55
56      Notes:
57        - On series supporting DMAMUX, the DMA phandle should be provided
58          but DMAMUX node should also be enabled in the DTS.
59        - For channel configuration, only the config bits priority and
60          periph/mem datasize are used. The periph/mem datasize must be equal,
61          0 is a correct value.
62         - There is no Fifo used by this DMA peripheral.
63
64      For example dmas for TX/RX on OSPI
65         dmas = <&dma1 5 41 0x10000>;
66
67  dma-names:
68    description: |
69      DMA channel name. If DMA should be used, expected value is "tx_rx".
70
71      For example
72         dma-names = "tx_rx";
73
74  dlyb-bypass:
75    type: boolean
76    description: |
77      Enables Delay Block (DLYB) Bypass.
78
79  ssht-enable:
80    type: boolean
81    description: |
82      Enables Sample Shifting half-cycle.
83
84      It is recommended to be enabled in STR mode and disabled in DTR mode.
85
86  io-low-port:
87    type: string
88    enum:
89      - "IOPORT_NONE"
90      - "IOPORT_1_LOW"
91      - "IOPORT_1_HIGH"
92      - "IOPORT_2_LOW"
93      - "IOPORT_2_HIGH"
94    description: |
95      Specifies which port of the OCTOSPI IO Manager is used for the IO[3:0] pins.
96
97      If absent, then `IOPORT_<n>_LOW` is used where `n` is the OSPI
98      instance number.
99
100      Note: You might need to enable the OCTOSPI I/O manager clock to use the
101            property. Please refer to Reference Manual.
102            The clock can be enabled in the devicetree.
103
104  io-high-port:
105    type: string
106    enum:
107      - "IOPORT_NONE"
108      - "IOPORT_1_LOW"
109      - "IOPORT_1_HIGH"
110      - "IOPORT_2_LOW"
111      - "IOPORT_2_HIGH"
112    description: |
113      Specifies which port of the OCTOSPI IO Manager is used for the IO[7:4] pins.
114
115      If absent, then `IOPORT_<n>_HIGH` is used where `n` is the OSPI
116      instance number.
117
118      Can be set to `IOPORT_NONE` for Single SPI, Dual SPI and Quad SPI.
119
120      Note: You might need to enable the OCTOSPI I/O manager clock to use the
121            property. Please refer to Reference Manual.
122            The clock can be enabled in the devicetree.
123
124  clk-port:
125    type: int
126    enum:
127      - 1
128      - 2
129    description: |
130      Specifies which port of the OCTOSPI IO Manager is used for the clk pin.
131
132      If absent, then n is used where `n` is the OSPI
133      instance number.
134
135      Note: You might need to enable the OCTOSPI I/O manager clock to use the
136            property. Please refer to Reference Manual.
137            The clock can be enabled in the devicetree.
138
139  dqs-port:
140    type: int
141    enum:
142      - 1
143      - 2
144    description: |
145      Specifies which port of the OCTOSPI IO Manager is used for the dqs pin.
146
147      If absent, then n is used where `n` is the OSPI
148      instance number.
149
150      Note: You might need to enable the OCTOSPI I/O manager clock to use the
151            property. Please refer to Reference Manual.
152            The clock can be enabled in the devicetree.
153
154  ncs-port:
155    type: int
156    enum:
157      - 1
158      - 2
159    description: |
160      Specifies which port of the OCTOSPI IO Manager is used for the ncs pin.
161
162      If absent, then n is used where `n` is the OSPI
163      instance number.
164
165      Note: You might need to enable the OCTOSPI I/O manager clock to use the
166            property. Please refer to Reference Manual.
167            The clock can be enabled in the devicetree.
168