1# Copyright (c) 2019, Peter Bigot Consulting, LLC 2# SPDX-License-Identifier: Apache-2.0 3 4description: | 5 Description for a voltage divider, with optional ability to measure 6 resistance of the upper leg. 7 8compatible: "voltage-divider" 9 10include: base.yaml 11 12properties: 13 io-channels: 14 required: true 15 description: | 16 Channels available with this divider configuration. 17 18 output-ohms: 19 type: int 20 required: true 21 description: | 22 Resistance of the lower leg of the voltage divider 23 24 full-ohms: 25 type: int 26 description: | 27 Resistance of the full path through the voltage divider. 28 29 If absent or zero the driver assumes that the upper leg is a 30 resistance-based sensor. 31 32 power-gpios: 33 type: phandle-array 34 description: | 35 Control power to the voltage divider inputs. 36 37 If present the corresponding GPIO must be set to an active level 38 to enable the divider input. 39 40 power-on-sample-delay-us: 41 type: int 42 default: 100 43 description: | 44 Duration to delay sampling after enabling the circuitry with 45 `power-gpios`. In most cases the switched voltage rail will 46 require some non-zero time to settle to its final value. The 47 default value of 100us should be sufficient in most situations. 48
