1# Copyright (c) 2022 ITE Corporation. All Rights Reserved. 2# SPDX-License-Identifier: Apache-2.0 3 4description: Common fields for ITE it8xxx2 I2C 5 6include: [i2c-controller.yaml, pinctrl-device.yaml] 7 8properties: 9 reg: 10 required: true 11 12 interrupts: 13 required: true 14 15 port-num: 16 type: int 17 required: true 18 enum: 19 - 0 20 - 1 21 - 2 22 - 3 23 - 4 24 - 5 25 description: Ordinal identifying the port 26 0 = SMB_CHANNEL_A, 27 1 = SMB_CHANNEL_B, 28 2 = SMB_CHANNEL_C, 29 3 = I2C_CHANNEL_D, 30 4 = I2C_CHANNEL_E, 31 5 = I2C_CHANNEL_F, 32 33 channel-switch-sel: 34 type: int 35 required: true 36 enum: 37 - 0 38 - 1 39 - 2 40 - 3 41 - 4 42 - 5 43 description: | 44 The default setting is as described below 45 0 = I2C_CHA_LOCATE: Channel A is located at SMCLK0/SMDAT0 46 1 = I2C_CHB_LOCATE: Channel B is located at SMCLK1/SMDAT1 47 2 = I2C_CHC_LOCATE: Channel C is located at SMCLK2/SMDAT2 48 3 = I2C_CHD_LOCATE: Channel D is located at SMCLK3/SMDAT3 49 4 = I2C_CHE_LOCATE: Channel E is located at SMCLK4/SMDAT4 50 5 = I2C_CHF_LOCATE: Channel F is located at SMCLK5/SMDAT5 51 52 The following is an example of the 'channel-switch-sel' property 53 being swapped between node &i2c0 and &i2c2 in the application: 54 Note: The property of 'port-num' cannot be changed in the 55 application. 56 57 Channel C is located at SMCLK0/SMDAT0: 58 &i2c0 { 59 channel-switch-sel = <I2C_CHC_LOCATE>; 60 pinctrl-0 = <&i2c2_clk_gpf6_default 61 &i2c2_data_gpf7_default>; 62 pinctrl-names = "default"; 63 scl-gpios = <&gpiof 6 0>; 64 sda-gpios = <&gpiof 7 0>; 65 }; 66 67 Channel A is located at SMCLK2/SMDAT2: 68 &i2c2 { 69 channel-switch-sel = <I2C_CHA_LOCATE>; 70 pinctrl-0 = <&i2c0_clk_gpb3_default 71 &i2c0_data_gpb4_default>; 72 pinctrl-names = "default"; 73 scl-gpios = <&gpiob 3 0>; 74 sda-gpios = <&gpiob 4 0>; 75 }; 76 77 If the property of 'channel-switch-sel' is changed, the pinctrl 78 setting and recovery pin in &i2c0 and &i2c2 nodes must also be 79 modified accordingly. 80 81 scl-gpios: 82 type: phandle-array 83 required: true 84 description: | 85 The SCL pin for the selected port. 86 87 sda-gpios: 88 type: phandle-array 89 required: true 90 description: | 91 The SDA pin for the selected port. 92 93 clock-gate-offset: 94 type: int 95 required: true 96 description: | 97 The clock gate offsets combine the register offset from 98 ECPM_BASE and the mask within that register into one value. 99 100 transfer-timeout-ms: 101 type: int 102 default: 100 103 description: | 104 Maximum time allowed for an I2C transfer. 105 106 pinctrl-0: 107 required: true 108 109 pinctrl-names: 110 required: true 111 112 push-pull-recovery: 113 type: boolean 114 description: | 115 This property is enabled when selecting the push-pull GPIO output 116 type to drive the I2C recovery. The default is open-drain. 117