1# Copyright (c) 2023 Cypress Semiconductor Corporation (an Infineon company) or
2# an affiliate of Cypress Semiconductor Corporation
3#
4# SPDX-License-Identifier: Apache-2.0
5
6description: |
7
8  Infineon XMC4XXX I2C
9
10  This driver configures the USIC as an I2C device.
11
12  Example devicetree configuration with an adt7420 temperature sensor
13  connected on the bus:
14
15  &usic1ch1 {
16      compatible = "infineon,xmc4xxx-i2c";
17      status = "okay";
18
19      pinctrl-0 = <&i2c_scl_p0_13_u1c1 &i2c_sda_p3_15_u1c1>;
20      pinctrl-names = "default";
21      scl-src = "DX1B";
22      sda-src = "DX0A";
23      interrupts = <94 1>;
24
25      #address-cells = <1>;
26      #size-cells = <0>;
27
28      clock-frequency = <I2C_BITRATE_STANDARD>;
29      adt7420@48 {
30          compatible = "adi,adt7420";
31          reg = <0x48>;
32      };
33  };
34
35  The pinctrl nodes need to be configured as open-drain and
36  hwctrl should be disabled:
37
38  &i2c_scl_p0_13_u1c1 {
39      drive-strength = "strong-sharp-edge";
40      drive-open-drain;
41      hwctrl = "disabled";
42  };
43
44  &i2c_sda_p3_15_u1c1 {
45      drive-strength = "strong-soft-edge";
46      drive-open-drain;
47      hwctrl = "disabled";
48  };
49
50compatible: "infineon,xmc4xxx-i2c"
51
52include: [i2c-controller.yaml, pinctrl-device.yaml]
53
54properties:
55  reg:
56    type: array
57    required: true
58
59  scl-src:
60    description: |
61      Connects the I2C clock line (USIC DX1 input) to a specific GPIO pin.
62      The USIC DX1 input is a multiplexer which connects to different GPIO pins.
63      Refer to the XMC4XXX reference manual for the GPIO pin/mux mappings.
64    type: string
65    required: true
66    enum:
67      - "DX1A"
68      - "DX1B"
69      - "DX1C"
70      - "DX1D"
71      - "DX1E"
72      - "DX1F"
73      - "DX1G"
74
75  sda-src:
76    description: |
77      Connects the I2C data line (USIC DX0 input) to a specific GPIO pin.
78      The USIC DX0 input is a multiplexer which connects to different GPIO pins.
79      Refer to the XMC4XXX reference manual for the GPIO pin/mux mappings.
80    type: string
81    required: true
82    enum:
83      - "DX0A"
84      - "DX0B"
85      - "DX0C"
86      - "DX0D"
87      - "DX0E"
88      - "DX0F"
89      - "DX0G"
90
91  interrupts:
92    required: true
93    description: |
94      IRQ number and priority to use for interrupt driven by I2C.
95      Each USIC must use a certain interrupt range:
96      USIC0 = [84, 89]
97      USIC1 = [90, 95]
98      USIC2 = [96, 101]
99
100  pinctrl-0:
101    description: |
102      PORT pin configuration for SCL, SDA signals.
103      We expect that the phandles will reference pinctrl nodes. These
104      nodes will have a nodelabel that matches the Infineon SoC Pinctrl
105      defines and have following
106      format: i2c_<signal>_p<port>_<pin>_<peripheral inst>
107
108      Examples:
109        pinctrl-0 = <&i2c_scl_p5_2_u2c0 &i2c_sda_p5_0_u2c0>;
110
111      The pins should set to open-drain and hwctrl should be disabled.
112
113      &i2c_scl_p5_2_u2c0 {
114          drive-strength = "strong-sharp-edge";
115          drive-open-drain;
116          hwctrl = "disabled";
117      };
118
119      In the above example, the pin is both an input and output (as is
120      required for I2C setup). It is internally connected to both DX0
121      and DOUT0 of USIC2 channel 0. (See XMC4700/4800 reference manual
122      page 18-110, Figure 18-50 for more details).
123      This limits the number of pins that can be used for the I2C module.
124
125      To get around this pin limitation, it is possible to use pins
126      that do not have this internal connection, and instead connect the
127      pins externally on the board.
128      For example, for the SDA line on USIC2 channel 0, P3.8 may be used
129      for DOUT0 and P6.5 for DX0. These type of pinctrl nodes will have
130      labels:
131      i2c_sda_dout0_p3_8_u2c0 and i2c_sda_dx0_p6_5_u2c0.
132      The generalized format is: i2c_<signal>_<type>_p<port>_<pin>_<peripheral inst>
133
134      An example for SCL and SDA signals on the xmc4700:
135      pinctrl-0 = <&i2c_sda_dout0_p3_8_u2c0 &i2c_sda_dx0_p6_5_u2c0
136                  &i2c_scl_dout1_p3_9_u2c0 &i2c_scl_p5_2_u2c0>;
137
138      Externally P3.8 should be connected to P6.5; P3.9 should be connected
139      to P5.2.
140
141      Note that any pins that do not have dout0/dx0 or dout1/dx1 can have either
142      function. Thus node i2c_scl_p5_0_u2c0 can be both dout1 and dx1.
143
144      For the pin configurations, the output pins (dout0 and dout1) should be set
145      to open-drain while the input pins (dx0 and dx1) should not include this setting.
146
147      &i2c_sda_dout0_p3_8_u2c0 {
148          drive-strength = "strong-sharp-edge";
149          drive-open-drain;
150          hwctrl = "disabled";
151      };
152
153      &i2c_scl_dout1_p3_9_u2c0 {
154          drive-strength = "strong-sharp-edge";
155          drive-open-drain;
156          hwctrl = "disabled";
157      };
158
159      &i2c_sda_dx0_p6_5_u2c0 {   /* will require USIC setting sda-src = DX0D */
160          hwctrl = "disabled";
161      };
162
163      &i2c_scl_p5_2_u2c0 {  /* will require USIC scl-src = DX1A */
164          hwctrl = "disabled";
165      };
166
167    required: true
168
169  pinctrl-names:
170    required: true
171