1# Copyright (c) 2023 Intel Corporation
2# SPDX-License-Identifier: Apache-2.0
3
4description: Altera PIO node
5
6compatible: "altr,pio-1.0"
7
8include: [gpio-controller.yaml, base.yaml]
9
10properties:
11  reg:
12    required: true
13
14  direction:
15    type: string
16    description: |
17      Direction can be set to bidir, input, inout or output.
18      It cannot be configure when during the runtime and should be
19      set according to the synthesized FPGA design.
20    default: output
21    enum:
22      - "bidir"
23      - "input"
24      - "inout"
25      - "output"
26
27  outset:
28    type: boolean
29    description: |
30      Enable outset register to specify which bit of the output port to set.
31
32  outclear:
33    type: boolean
34    description: |
35      Enable outclear register to specify which output bit to clear.
36
37  "#gpio-cells":
38    const: 2
39
40gpio-cells:
41  - pin
42  - flags
43