1/*
2 * Copyright (c) 2023 STMicroelectronics
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <mem.h>
8#include <st/l4/stm32l4p5.dtsi>
9
10/delete-node/ &sdmmc2;
11/delete-node/ &sram2; /* different memory address */
12
13/ {
14	/* total SRAM 640KB for the stm32L4R5x and stm32L4S5x */
15	sram0: memory@20000000 {
16		reg = <0x20000000 DT_SIZE_K(192)>;
17	};
18	sram1: memory@10000000 {
19		reg = <0x10000000 DT_SIZE_K(64)>;
20	};
21	sram2: memory@20040000 {
22		reg = <0x20040000 DT_SIZE_K(384)>;
23	};
24
25	soc {
26		compatible = "st,stm32l4r5", "st,stm32l4", "simple-bus";
27
28		rtc@40002800 {
29			bbram: backup_regs {
30				compatible = "st,stm32-bbram";
31				st,backup-regs = <32>;
32				status = "disabled";
33			};
34		};
35	};
36};
37