1/*
2 * Copyright (c) 2018 Linaro Limited
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <mem.h>
8#include <st/f3/stm32f334.dtsi>
9
10/ {
11	ccm0: memory@10000000 {
12		compatible = "zephyr,memory-region", "st,stm32-ccm";
13		reg = <0x10000000 DT_SIZE_K(4)>;
14		zephyr,memory-region = "CCM";
15	};
16
17	sram0: memory@20000000 {
18		reg = <0x20000000 DT_SIZE_K(12)>;
19	};
20
21	soc {
22		flash-controller@40022000 {
23			flash0: flash@8000000 {
24				reg = <0x08000000 DT_SIZE_K(64)>;
25			};
26		};
27
28		dac2: dac@40009800 {
29			compatible = "st,stm32-dac";
30			reg = <0x40009800 0x400>;
31			clocks = <&rcc STM32_CLOCK(APB1, 26U)>;
32			status = "disabled";
33			#io-channel-cells = <1>;
34		};
35	};
36};
37