1/*
2 * Copyright (c) 2022 Kamil Serwus
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <atmel/samc2x.dtsi>
8
9/ {
10	aliases {
11		adc-1 = &adc1;
12
13		sercom-4 = &sercom4;
14		sercom-5 = &sercom5;
15	};
16
17	soc {
18		adc1: adc@42004800 {
19			compatible = "atmel,sam0-adc";
20			reg = <0x42004800 0x30>;
21			interrupts = <26 0>;
22			interrupt-names = "resrdy";
23			clocks = <&gclk 34>, <&mclk 0x1c 18>;
24			clock-names = "GCLK", "MCLK";
25			status = "disabled";
26
27			#io-channel-cells = <1>;
28
29			gclk = <0>;
30			prescaler = <4>;
31		};
32
33		sercom4: sercom@42001400 {
34			compatible = "atmel,sam0-sercom";
35			reg = <0x42001400 0x40>;
36			interrupts = <13 0>;
37			clocks = <&gclk 23>, <&mclk 0x1c 5>;
38			clock-names = "GCLK", "MCLK";
39			status = "disabled";
40		};
41
42		sercom5: sercom@42001800 {
43			compatible = "atmel,sam0-sercom";
44			reg = <0x42001800 0x40>;
45			interrupts = <14 0>;
46			clocks = <&gclk 25>, <&mclk 0x1c 6>;
47			clock-names = "GCLK", "MCLK";
48			status = "disabled";
49		};
50
51		can0: can@42001c00 {
52			compatible = "atmel,sam0-can";
53			reg = <0x42001c00 0x100>;
54			interrupts = <15 0>;
55			interrupt-names = "int0";
56			clocks = <&gclk 26>, <&mclk 0x10 8>;
57			clock-names = "GCLK", "MCLK";
58			status = "disabled";
59
60			bosch,mram-cfg = <0x0 28 8 3 3 0 1 1>;
61			divider = <12>;
62		};
63
64		can1: can@42002000 {
65			compatible = "atmel,sam0-can";
66			reg = <0x42002000 0x100>;
67			interrupts = <16 0>;
68			interrupt-names = "int0";
69			clocks = <&gclk 27>, <&mclk 0x10 9>;
70			clock-names = "GCLK", "MCLK";
71			status = "disabled";
72
73			bosch,mram-cfg = <0x0 28 8 3 3 0 1 1>;
74			divider = <12>;
75		};
76	};
77};
78