1/*
2 * Copyright (c) 2024 Analog Devices, Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <zephyr/dt-bindings/pinctrl/max32-pinctrl.h>
8
9/ {
10	soc {
11		pinctrl: pin-controller@40008000 {
12
13			/omit-if-no-ref/ swdio_p0_0: swdio_p0_0 {
14				pinmux = <MAX32_PINMUX(0, 0, AF1)>;
15			};
16
17			/omit-if-no-ref/ tmr0c_ia_p0_0: tmr0c_ia_p0_0 {
18				pinmux = <MAX32_PINMUX(0, 0, AF3)>;
19			};
20
21			/omit-if-no-ref/ swdclk_p0_1: swdclk_p0_1 {
22				pinmux = <MAX32_PINMUX(0, 1, AF1)>;
23			};
24
25			/omit-if-no-ref/ tmr0c_oa_p0_1: tmr0c_oa_p0_1 {
26				pinmux = <MAX32_PINMUX(0, 1, AF3)>;
27			};
28
29			/omit-if-no-ref/ i2c0a_scl_p0_6: i2c0a_scl_p0_6 {
30				pinmux = <MAX32_PINMUX(0, 6, AF1)>;
31			};
32
33			/omit-if-no-ref/ lptmr0b_ia_p0_6: lptmr0b_ia_p0_6 {
34				pinmux = <MAX32_PINMUX(0, 6, AF2)>;
35			};
36
37			/omit-if-no-ref/ tmr3c_ia_p0_6: tmr3c_ia_p0_6 {
38				pinmux = <MAX32_PINMUX(0, 6, AF3)>;
39			};
40
41			/omit-if-no-ref/ i2c0a_sda_p0_7: i2c0a_sda_p0_7 {
42				pinmux = <MAX32_PINMUX(0, 7, AF1)>;
43			};
44
45			/omit-if-no-ref/ lptmr0b_oa_p0_7: lptmr0b_oa_p0_7 {
46				pinmux = <MAX32_PINMUX(0, 7, AF2)>;
47			};
48
49			/omit-if-no-ref/ tmr3c_oa_p0_7: tmr3c_oa_p0_7 {
50				pinmux = <MAX32_PINMUX(0, 7, AF3)>;
51			};
52
53			/omit-if-no-ref/ uart0a_rx_p0_8: uart0a_rx_p0_8 {
54				pinmux = <MAX32_PINMUX(0, 8, AF1)>;
55			};
56
57			/omit-if-no-ref/ i2s0b_sdo_p0_8: i2s0b_sdo_p0_8 {
58				pinmux = <MAX32_PINMUX(0, 8, AF2)>;
59			};
60
61			/omit-if-no-ref/ tmr0c_ia_p0_8: tmr0c_ia_p0_8 {
62				pinmux = <MAX32_PINMUX(0, 8, AF3)>;
63			};
64
65			/omit-if-no-ref/ uart0a_tx_p0_9: uart0a_tx_p0_9 {
66				pinmux = <MAX32_PINMUX(0, 9, AF1)>;
67			};
68
69			/omit-if-no-ref/ i2s0b_lrclk_p0_9: i2s0b_lrclk_p0_9 {
70				pinmux = <MAX32_PINMUX(0, 9, AF2)>;
71			};
72
73			/omit-if-no-ref/ tmr0c_oa_p0_9: tmr0c_oa_p0_9 {
74				pinmux = <MAX32_PINMUX(0, 9, AF3)>;
75			};
76
77			/omit-if-no-ref/ uart0a_cts_p0_10: uart0a_cts_p0_10 {
78				pinmux = <MAX32_PINMUX(0, 10, AF1)>;
79			};
80
81			/omit-if-no-ref/ i2s0b_bclk_p0_10: i2s0b_bclk_p0_10 {
82				pinmux = <MAX32_PINMUX(0, 10, AF2)>;
83			};
84
85			/omit-if-no-ref/ tmr1c_ia_p0_10: tmr1c_ia_p0_10 {
86				pinmux = <MAX32_PINMUX(0, 10, AF3)>;
87			};
88
89			/omit-if-no-ref/ ext_clk_p0_10: ext_clk_p0_10 {
90				pinmux = <MAX32_PINMUX(0, 10, AF4)>;
91			};
92
93			/omit-if-no-ref/ uart0a_rts_p0_11: uart0a_rts_p0_11 {
94				pinmux = <MAX32_PINMUX(0, 11, AF1)>;
95			};
96
97			/omit-if-no-ref/ i2s0b_sdi_p0_11: i2s0b_sdi_p0_11 {
98				pinmux = <MAX32_PINMUX(0, 11, AF2)>;
99			};
100
101			/omit-if-no-ref/ tmr1c_oa_p0_11: tmr1c_oa_p0_11 {
102				pinmux = <MAX32_PINMUX(0, 11, AF3)>;
103			};
104
105			/omit-if-no-ref/ tmr2c_oa_p0_13: tmr2c_oa_p0_13 {
106				pinmux = <MAX32_PINMUX(0, 13, AF3)>;
107			};
108
109			/omit-if-no-ref/ spi1d_ss0_p0_13: spi1d_ss0_p0_13 {
110				pinmux = <MAX32_PINMUX(0, 13, AF4)>;
111			};
112
113			/omit-if-no-ref/ spi1a_miso_p0_14: spi1a_miso_p0_14 {
114				pinmux = <MAX32_PINMUX(0, 14, AF1)>;
115			};
116
117			/omit-if-no-ref/ uart2b_rx_p0_14: uart2b_rx_p0_14 {
118				pinmux = <MAX32_PINMUX(0, 14, AF2)>;
119			};
120
121			/omit-if-no-ref/ tmr3c_ia_p0_14: tmr3c_ia_p0_14 {
122				pinmux = <MAX32_PINMUX(0, 14, AF3)>;
123			};
124
125			/omit-if-no-ref/ spi1a_mosi_p0_15: spi1a_mosi_p0_15 {
126				pinmux = <MAX32_PINMUX(0, 15, AF1)>;
127			};
128
129			/omit-if-no-ref/ uart2b_tx_p0_15: uart2b_tx_p0_15 {
130				pinmux = <MAX32_PINMUX(0, 15, AF2)>;
131			};
132
133			/omit-if-no-ref/ tmr3c_oa_p0_15: tmr3c_oa_p0_15 {
134				pinmux = <MAX32_PINMUX(0, 15, AF3)>;
135			};
136
137			/omit-if-no-ref/ spi1a_sck_p0_16: spi1a_sck_p0_16 {
138				pinmux = <MAX32_PINMUX(0, 16, AF1)>;
139			};
140
141			/omit-if-no-ref/ uart2b_cts_p0_16: uart2b_cts_p0_16 {
142				pinmux = <MAX32_PINMUX(0, 16, AF2)>;
143			};
144
145			/omit-if-no-ref/ tmr0c_ia_p0_16: tmr0c_ia_p0_16 {
146				pinmux = <MAX32_PINMUX(0, 16, AF3)>;
147			};
148
149			/omit-if-no-ref/ spi1a_ss0_p0_17: spi1a_ss0_p0_17 {
150				pinmux = <MAX32_PINMUX(0, 17, AF1)>;
151			};
152
153			/omit-if-no-ref/ uart2b_rts_p0_17: uart2b_rts_p0_17 {
154				pinmux = <MAX32_PINMUX(0, 17, AF2)>;
155			};
156
157			/omit-if-no-ref/ tmr0c_oa_p0_17: tmr0c_oa_p0_17 {
158				pinmux = <MAX32_PINMUX(0, 17, AF3)>;
159			};
160
161			/omit-if-no-ref/ i2c2a_scl_p0_18: i2c2a_scl_p0_18 {
162				pinmux = <MAX32_PINMUX(0, 18, AF1)>;
163			};
164
165			/omit-if-no-ref/ tmr1c_ia_p0_18: tmr1c_ia_p0_18 {
166				pinmux = <MAX32_PINMUX(0, 18, AF3)>;
167			};
168
169			/omit-if-no-ref/ i2c2a_sda_p0_19: i2c2a_sda_p0_19 {
170				pinmux = <MAX32_PINMUX(0, 19, AF1)>;
171			};
172
173			/omit-if-no-ref/ tmr1c_oa_p0_19: tmr1c_oa_p0_19 {
174				pinmux = <MAX32_PINMUX(0, 19, AF3)>;
175			};
176
177			/omit-if-no-ref/ cm4_tx_p0_21: cm4_tx_p0_21 {
178				pinmux = <MAX32_PINMUX(0, 21, AF1)>;
179			};
180
181			/omit-if-no-ref/ tmr2c_oa_p0_21: tmr2c_oa_p0_21 {
182				pinmux = <MAX32_PINMUX(0, 21, AF3)>;
183			};
184
185			/omit-if-no-ref/ tmr3c_oa_p0_31: tmr3c_oa_p0_31 {
186				pinmux = <MAX32_PINMUX(0, 31, AF3)>;
187			};
188
189			/omit-if-no-ref/ uart2a_rx_p1_8: uart2a_rx_p1_8 {
190				pinmux = <MAX32_PINMUX(1, 8, AF1)>;
191			};
192
193			/omit-if-no-ref/ uart2b_rts_p1_8: uart2b_rts_p1_8 {
194				pinmux = <MAX32_PINMUX(1, 8, AF2)>;
195			};
196
197			/omit-if-no-ref/ uart2a_tx_p1_9: uart2a_tx_p1_9 {
198				pinmux = <MAX32_PINMUX(1, 9, AF1)>;
199			};
200
201			/omit-if-no-ref/ uart2a_cts_p1_10: uart2a_cts_p1_10 {
202				pinmux = <MAX32_PINMUX(1, 10, AF1)>;
203			};
204
205			/omit-if-no-ref/ uart2a_rts_p1_11: uart2a_rts_p1_11 {
206				pinmux = <MAX32_PINMUX(1, 11, AF1)>;
207			};
208
209			/omit-if-no-ref/ tmr2c_oa_p1_11: tmr2c_oa_p1_11 {
210				pinmux = <MAX32_PINMUX(1, 11, AF3)>;
211			};
212		};
213	};
214};
215