1/*
2 * Copyright (c) 2023-2024 Analog Devices, Inc.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#include <zephyr/dt-bindings/pinctrl/max32-pinctrl.h>
8
9/ {
10	soc {
11		pinctrl: pin-controller@40008000 {
12
13			/omit-if-no-ref/ spixf_ss0_p0_0: spixf_ss0_p0_0 {
14				pinmux = <MAX32_PINMUX(0, 0, AF1)>;
15			};
16
17			/omit-if-no-ref/ uart2_cts_p0_0: uart2_cts_p0_0 {
18				pinmux = <MAX32_PINMUX(0, 0, AF3)>;
19			};
20
21			/omit-if-no-ref/ tmr0_p0_0: tmr0_p0_0 {
22				pinmux = <MAX32_PINMUX(0, 0, AF4)>;
23			};
24
25			/omit-if-no-ref/ spixf_mosi_p0_1: spixf_mosi_p0_1 {
26				pinmux = <MAX32_PINMUX(0, 1, AF1)>;
27			};
28
29			/omit-if-no-ref/ uart2_tx_p0_1: uart2_tx_p0_1 {
30				pinmux = <MAX32_PINMUX(0, 1, AF3)>;
31			};
32
33			/omit-if-no-ref/ tmr1_p0_1: tmr1_p0_1 {
34				pinmux = <MAX32_PINMUX(0, 1, AF4)>;
35			};
36
37			/omit-if-no-ref/ spixf_miso_p0_2: spixf_miso_p0_2 {
38				pinmux = <MAX32_PINMUX(0, 2, AF1)>;
39			};
40
41			/omit-if-no-ref/ uart2_rx_p0_2: uart2_rx_p0_2 {
42				pinmux = <MAX32_PINMUX(0, 2, AF3)>;
43			};
44
45			/omit-if-no-ref/ tmr2_p0_2: tmr2_p0_2 {
46				pinmux = <MAX32_PINMUX(0, 2, AF4)>;
47			};
48
49			/omit-if-no-ref/ spixf_sck_p0_3: spixf_sck_p0_3 {
50				pinmux = <MAX32_PINMUX(0, 3, AF1)>;
51			};
52
53			/omit-if-no-ref/ uart2_rts_p0_3: uart2_rts_p0_3 {
54				pinmux = <MAX32_PINMUX(0, 3, AF3)>;
55			};
56
57			/omit-if-no-ref/ tmr3_p0_3: tmr3_p0_3 {
58				pinmux = <MAX32_PINMUX(0, 3, AF4)>;
59			};
60
61			/omit-if-no-ref/ spixf_sdio2_p0_4: spixf_sdio2_p0_4 {
62				pinmux = <MAX32_PINMUX(0, 4, AF1)>;
63			};
64
65			/omit-if-no-ref/ owm_io_p0_4: owm_io_p0_4 {
66				pinmux = <MAX32_PINMUX(0, 4, AF3)>;
67			};
68
69			/omit-if-no-ref/ tmr4_p0_4: tmr4_p0_4 {
70				pinmux = <MAX32_PINMUX(0, 4, AF4)>;
71			};
72
73			/omit-if-no-ref/ spixf_sdio3_p0_5: spixf_sdio3_p0_5 {
74				pinmux = <MAX32_PINMUX(0, 5, AF1)>;
75			};
76
77			/omit-if-no-ref/owm_pe_p0_5: owm_pe_p0_5 {
78				pinmux = <MAX32_PINMUX(0, 5, AF3)>;
79			};
80
81			/omit-if-no-ref/ tmr5_p0_5: tmr5_p0_5 {
82				pinmux = <MAX32_PINMUX(0, 5, AF4)>;
83			};
84
85			/omit-if-no-ref/ i2c0_scl_p0_6: i2c0_scl_p0_6 {
86				pinmux = <MAX32_PINMUX(0, 6, AF1)>;
87			};
88
89			/omit-if-no-ref/ swdio2_p0_6: swdio2_p0_6 {
90				pinmux = <MAX32_PINMUX(0, 6, AF3)>;
91			};
92
93			/omit-if-no-ref/ tmr0_p0_6: tmr0_p0_6 {
94				pinmux = <MAX32_PINMUX(0, 6, AF4)>;
95			};
96
97			/omit-if-no-ref/ i2c0_sda_p0_7: i2c0_sda_p0_7 {
98				pinmux = <MAX32_PINMUX(0, 7, AF1)>;
99			};
100
101			/omit-if-no-ref/ swclk2_p0_7: swclck2_p0_7 {
102				pinmux = <MAX32_PINMUX(0, 7, AF3)>;
103			};
104
105			/omit-if-no-ref/ tmr1_p0_7: tmr1_p0_7 {
106				pinmux = <MAX32_PINMUX(0, 7, AF4)>;
107			};
108
109			/omit-if-no-ref/ spixr_ss0_p0_8: spixr_ss0_p0_8 {
110				pinmux = <MAX32_PINMUX(0, 8, AF1)>;
111			};
112
113			/omit-if-no-ref/ spi0_ss0_p0_8: spi0_ss0_p0_8 {
114				pinmux = <MAX32_PINMUX(0, 8, AF2)>;
115			};
116
117			/omit-if-no-ref/ uart0_cts_p0_8: uart0_cts_p0_8 {
118				pinmux = <MAX32_PINMUX(0, 8, AF3)>;
119			};
120
121			/omit-if-no-ref/ tmr2_p0_8: tmr2_p0_8 {
122				pinmux = <MAX32_PINMUX(0, 8, AF4)>;
123			};
124
125			/omit-if-no-ref/ spixr_mosi_p0_9: spixr_mosi_p0_9 {
126				pinmux = <MAX32_PINMUX(0, 9, AF1)>;
127			};
128
129			/omit-if-no-ref/ spi0_mosi_p0_9: spi0_mosi_p0_9 {
130				pinmux = <MAX32_PINMUX(0, 9, AF2)>;
131			};
132
133			/omit-if-no-ref/ uart0_tx_p0_9: uart0_tx_p0_9 {
134				pinmux = <MAX32_PINMUX(0, 9, AF3)>;
135			};
136
137			/omit-if-no-ref/ tmr3_p0_9: tmr3_p0_9 {
138				pinmux = <MAX32_PINMUX(0, 9, AF4)>;
139			};
140
141			/omit-if-no-ref/ spixr_miso_p0_10: spixr_miso_p0_10 {
142				pinmux = <MAX32_PINMUX(0, 10, AF1)>;
143			};
144
145			/omit-if-no-ref/ spi0_miso_p0_10: spi0_miso_p0_10 {
146				pinmux = <MAX32_PINMUX(0, 10, AF2)>;
147			};
148
149			/omit-if-no-ref/ uart0_rx_p0_10: uart0_rx_p0_10 {
150				pinmux = <MAX32_PINMUX(0, 10, AF3)>;
151			};
152
153			/omit-if-no-ref/ tmr4_p0_10: tmr4_p0_10 {
154				pinmux = <MAX32_PINMUX(0, 10, AF4)>;
155			};
156
157			/omit-if-no-ref/ spixr_sck_p0_11: spixr_sck_p0_11 {
158				pinmux = <MAX32_PINMUX(0, 11, AF1)>;
159			};
160
161			/omit-if-no-ref/ spi0_sck_p0_11: spi0_sck_p0_11 {
162				pinmux = <MAX32_PINMUX(0, 11, AF2)>;
163			};
164
165			/omit-if-no-ref/ uart0_rts_p0_11: uart0_rts_p0_11 {
166				pinmux = <MAX32_PINMUX(0, 11, AF3)>;
167			};
168
169			/omit-if-no-ref/ tmr5_p0_11: tmr5_p0_11 {
170				pinmux = <MAX32_PINMUX(0, 11, AF4)>;
171			};
172
173			/omit-if-no-ref/ spixr_sdio2_p0_12: spixr_sdio2_p0_12 {
174				pinmux = <MAX32_PINMUX(0, 12, AF1)>;
175			};
176
177			/omit-if-no-ref/ spi0_sdio2_p0_12: spi0_sdio2_p0_12 {
178				pinmux = <MAX32_PINMUX(0, 12, AF2)>;
179			};
180
181			/omit-if-no-ref/ owm_io_p0_12: owm_io_p0_12 {
182				pinmux = <MAX32_PINMUX(0, 12, AF3)>;
183			};
184
185			/omit-if-no-ref/ tmr0_p0_12: tmr0_p0_12 {
186				pinmux = <MAX32_PINMUX(0, 12, AF4)>;
187			};
188
189			/omit-if-no-ref/ spixr_sdio3_p0_13: spixr_sdio3_p0_13 {
190				pinmux = <MAX32_PINMUX(0, 13, AF1)>;
191			};
192
193			/omit-if-no-ref/ spi0_sdio3_p0_13: spi0_sdio3_p0_13 {
194				pinmux = <MAX32_PINMUX(0, 13, AF2)>;
195			};
196
197			/omit-if-no-ref/ owm_pe_p0_13: owm_pe_p0_13 {
198				pinmux = <MAX32_PINMUX(0, 13, AF3)>;
199			};
200
201			/omit-if-no-ref/ tmr1_p0_13: tmr1_p0_13 {
202				pinmux = <MAX32_PINMUX(0, 13, AF4)>;
203			};
204
205			/omit-if-no-ref/ i2c1_scl_p0_14: i2c1_scl_p0_14 {
206				pinmux = <MAX32_PINMUX(0, 14, AF1)>;
207			};
208
209			/omit-if-no-ref/ spi0_ss1_p0_14: spi0_ss1_p0_14 {
210				pinmux = <MAX32_PINMUX(0, 14, AF2)>;
211			};
212
213			/omit-if-no-ref/ tmr2_p0_14: tmr2_p0_14 {
214				pinmux = <MAX32_PINMUX(0, 14, AF4)>;
215			};
216
217			/omit-if-no-ref/ i2c1_sda_p0_15: i2c1_sda_p0_15 {
218				pinmux = <MAX32_PINMUX(0, 15, AF1)>;
219			};
220
221			/omit-if-no-ref/ spi0_ss2_p0_15: spi0_ss2_p0_15 {
222				pinmux = <MAX32_PINMUX(0, 15, AF2)>;
223			};
224
225			/omit-if-no-ref/ tmr3_p0_15: tmr3_p0_15 {
226				pinmux = <MAX32_PINMUX(0, 15, AF4)>;
227			};
228
229			/omit-if-no-ref/ ain0n_p0_16: ain0n_p0_16 {
230				pinmux = <MAX32_PINMUX(0, 16, AF1)>;
231			};
232
233			/omit-if-no-ref/ spi1_ss0_p0_16: spi1_ss0_p0_16 {
234				pinmux = <MAX32_PINMUX(0, 16, AF2)>;
235			};
236
237			/omit-if-no-ref/ owm_io_p0_16: owm_io_p0_16 {
238				pinmux = <MAX32_PINMUX(0, 16, AF3)>;
239			};
240
241			/omit-if-no-ref/ tmr4_p0_16: tmr4_p0_16 {
242				pinmux = <MAX32_PINMUX(0, 16, AF4)>;
243			};
244
245			/omit-if-no-ref/ ain0p_p0_17: ain0p_p0_17 {
246				pinmux = <MAX32_PINMUX(0, 17, AF1)>;
247			};
248
249			/omit-if-no-ref/ spi1_mosi_p0_17: spi1_mosi_p0_17 {
250				pinmux = <MAX32_PINMUX(0, 17, AF2)>;
251			};
252
253			/omit-if-no-ref/ owm_pe_p0_17: owm_pe_p0_17 {
254				pinmux = <MAX32_PINMUX(0, 17, AF3)>;
255			};
256
257			/omit-if-no-ref/ tmr5_p0_17: tmr5_p0_17 {
258				pinmux = <MAX32_PINMUX(0, 17, AF4)>;
259			};
260
261			/omit-if-no-ref/ ain1n_p0_18: ain1n_p0_18 {
262				pinmux = <MAX32_PINMUX(0, 18, AF1)>;
263			};
264
265			/omit-if-no-ref/ spi1_miso_p0_18: spi1_miso_p0_18 {
266				pinmux = <MAX32_PINMUX(0, 18, AF2)>;
267			};
268
269			/omit-if-no-ref/ tmr0_p0_18: tmr0_p0_18 {
270				pinmux = <MAX32_PINMUX(0, 18, AF4)>;
271			};
272
273			/omit-if-no-ref/ ain1p_p0_19: ain1p_p0_19 {
274				pinmux = <MAX32_PINMUX(0, 19, AF1)>;
275			};
276
277			/omit-if-no-ref/ spi1_sck_p0_19: spi1_sck_p0_19 {
278				pinmux = <MAX32_PINMUX(0, 19, AF2)>;
279			};
280
281			/omit-if-no-ref/ tmr1_p0_19: tmr1_p0_19 {
282				pinmux = <MAX32_PINMUX(0, 19, AF4)>;
283			};
284
285			/omit-if-no-ref/ ain2n_p0_20: ain2n_p0_20 {
286				pinmux = <MAX32_PINMUX(0, 20, AF1)>;
287			};
288
289			/omit-if-no-ref/ spi1_sdio2_p0_20: spi1_sdio2_p0_20 {
290				pinmux = <MAX32_PINMUX(0, 20, AF2)>;
291			};
292
293			/omit-if-no-ref/ uart1_rx_p0_20: uart1_rx_p0_20 {
294				pinmux = <MAX32_PINMUX(0, 20, AF3)>;
295			};
296
297			/omit-if-no-ref/ tmr2_p0_20: tmr2_p0_20 {
298				pinmux = <MAX32_PINMUX(0, 20, AF4)>;
299			};
300
301			/omit-if-no-ref/ ain2p_p0_21: ain2p_p0_21 {
302				pinmux = <MAX32_PINMUX(0, 21, AF1)>;
303			};
304
305			/omit-if-no-ref/ spi1_sdio3_p0_21: spi1_sdio3_p0_21 {
306				pinmux = <MAX32_PINMUX(0, 21, AF2)>;
307			};
308
309			/omit-if-no-ref/ uart1_tx_p0_21: uart1_tx_p0_21 {
310				pinmux = <MAX32_PINMUX(0, 21, AF3)>;
311			};
312
313			/omit-if-no-ref/ tmr3_p0_21: tmr3_p0_21 {
314				pinmux = <MAX32_PINMUX(0, 21, AF4)>;
315			};
316
317			/omit-if-no-ref/ ain3n_p0_22: ain3n_p0_22 {
318				pinmux = <MAX32_PINMUX(0, 22, AF1)>;
319			};
320
321			/omit-if-no-ref/ spi1_ss1_p0_22: spi1_ss1_p0_22 {
322				pinmux = <MAX32_PINMUX(0, 22, AF2)>;
323			};
324
325			/omit-if-no-ref/ uart1_cts_p0_22: uart1_cts_p0_22 {
326				pinmux = <MAX32_PINMUX(0, 22, AF3)>;
327			};
328
329			/omit-if-no-ref/ tmr4_p0_22: tmr4_p0_22 {
330				pinmux = <MAX32_PINMUX(0, 22, AF4)>;
331			};
332
333			/omit-if-no-ref/ ain3p_p0_23: ain3p_p0_23 {
334				pinmux = <MAX32_PINMUX(0, 23, AF1)>;
335			};
336
337			/omit-if-no-ref/ spi1_ss2_p0_23: spi1_ss2_p0_23 {
338				pinmux = <MAX32_PINMUX(0, 23, AF2)>;
339			};
340
341			/omit-if-no-ref/ uart1_rts_p0_23: uart1_rts_p0_23 {
342				pinmux = <MAX32_PINMUX(0, 23, AF3)>;
343			};
344
345			/omit-if-no-ref/ tmr5_p0_23: tmr5_p0_23 {
346				pinmux = <MAX32_PINMUX(0, 23, AF4)>;
347			};
348
349			/omit-if-no-ref/ pcm_lrclk_p0_24: pcm_lrclk_p0_24 {
350				pinmux = <MAX32_PINMUX(0, 24, AF1)>;
351			};
352
353			/omit-if-no-ref/ spi2_ss0_p0_24: spi2_ss0_p0_24 {
354				pinmux = <MAX32_PINMUX(0, 24, AF2)>;
355			};
356
357			/omit-if-no-ref/ owm_io_p0_24: owm_io_p0_24 {
358				pinmux = <MAX32_PINMUX(0, 24, AF3)>;
359			};
360
361			/omit-if-no-ref/ tmr0_p0_24: tmr0_p0_24 {
362				pinmux = <MAX32_PINMUX(0, 24, AF4)>;
363			};
364
365			/omit-if-no-ref/ pcm_dout_p0_25: pcm_dout_p0_25 {
366				pinmux = <MAX32_PINMUX(0, 25, AF1)>;
367			};
368
369			/omit-if-no-ref/ spi2_mosi_p0_25: spi2_mosi_p0_25 {
370				pinmux = <MAX32_PINMUX(0, 25, AF2)>;
371			};
372
373			/omit-if-no-ref/ owm_pe_p0_25: owm_pe_p0_25 {
374				pinmux = <MAX32_PINMUX(0, 25, AF3)>;
375			};
376
377			/omit-if-no-ref/ tmr1_p0_25: tmr1_p0_25 {
378				pinmux = <MAX32_PINMUX(0, 25, AF4)>;
379			};
380
381			/omit-if-no-ref/ pcm_din_p0_26: pcm_din_p0_26 {
382				pinmux = <MAX32_PINMUX(0, 26, AF1)>;
383			};
384
385			/omit-if-no-ref/ spi2_miso_p0_26: spi2_miso_p0_26 {
386				pinmux = <MAX32_PINMUX(0, 26, AF2)>;
387			};
388
389			/omit-if-no-ref/ tmr2_p0_26: tmr2_p0_26 {
390				pinmux = <MAX32_PINMUX(0, 26, AF4)>;
391			};
392
393			/omit-if-no-ref/ pcm_bclk_p0_27: pcm_bclk_p0_27 {
394				pinmux = <MAX32_PINMUX(0, 27, AF1)>;
395			};
396
397			/omit-if-no-ref/ spi2_sck_p0_27: spi2_sck_p0_27 {
398				pinmux = <MAX32_PINMUX(0, 27, AF2)>;
399			};
400
401			/omit-if-no-ref/ tmr3_p0_27: tmr3_p0_27 {
402				pinmux = <MAX32_PINMUX(0, 27, AF4)>;
403			};
404
405			/omit-if-no-ref/ pdm_data2_p0_28: pdm_data2_p0_28 {
406				pinmux = <MAX32_PINMUX(0, 28, AF1)>;
407			};
408
409			/omit-if-no-ref/ spi2_sdio2_p0_28: spi2_sdio2_p0_28 {
410				pinmux = <MAX32_PINMUX(0, 28, AF2)>;
411			};
412
413			/omit-if-no-ref/ uart2_rx_p0_28: uart2_rx_p0_28 {
414				pinmux = <MAX32_PINMUX(0, 28, AF3)>;
415			};
416
417			/omit-if-no-ref/ tmr4_p0_28: tmr4_p0_28 {
418				pinmux = <MAX32_PINMUX(0, 28, AF4)>;
419			};
420
421			/omit-if-no-ref/ pdm_data3_p0_29: pdm_data3_p0_29 {
422				pinmux = <MAX32_PINMUX(0, 29, AF1)>;
423			};
424
425			/omit-if-no-ref/ spi2_sdio3_p0_29: spi2_sdio3_p0_29 {
426				pinmux = <MAX32_PINMUX(0, 29, AF2)>;
427			};
428
429			/omit-if-no-ref/ uart2_tx_p0_29: uart2_tx_p0_29 {
430				pinmux = <MAX32_PINMUX(0, 29, AF3)>;
431			};
432
433			/omit-if-no-ref/ tmr5_p0_29: tmr5_p0_29 {
434				pinmux = <MAX32_PINMUX(0, 29, AF4)>;
435			};
436
437			/omit-if-no-ref/ pdm_rx_clk_p0_30: pdm_rx_clk_p0_30 {
438				pinmux = <MAX32_PINMUX(0, 30, AF1)>;
439			};
440
441			/omit-if-no-ref/ spi2_ss1_p0_30: spi2_ss1_p0_30 {
442				pinmux = <MAX32_PINMUX(0, 30, AF2)>;
443			};
444
445			/omit-if-no-ref/ uart2_cts_p0_30: uart2_cts_p0_30 {
446				pinmux = <MAX32_PINMUX(0, 30, AF3)>;
447			};
448
449			/omit-if-no-ref/ tmr0_p0_30: tmr0_p0_30 {
450				pinmux = <MAX32_PINMUX(0, 30, AF4)>;
451			};
452
453			/omit-if-no-ref/ pdm_mclk_p0_31: pdm_mclk_p0_31 {
454				pinmux = <MAX32_PINMUX(0, 31, AF1)>;
455			};
456
457			/omit-if-no-ref/ spi2_ss2_p0_31: spi2_ss2_p0_31 {
458				pinmux = <MAX32_PINMUX(0, 31, AF2)>;
459			};
460
461			/omit-if-no-ref/ uart2_rts_p0_31: uart2_rts_p0_31 {
462				pinmux = <MAX32_PINMUX(0, 31, AF3)>;
463			};
464
465			/omit-if-no-ref/ tmr1_p0_31: tmr1_p0_31 {
466				pinmux = <MAX32_PINMUX(0, 31, AF4)>;
467			};
468
469			/omit-if-no-ref/ sdhc_dat3_p1_0: sdhc_dat3_p1_0 {
470				pinmux = <MAX32_PINMUX(1, 0, AF1)>;
471			};
472
473			/omit-if-no-ref/ sdma_tms_p1_0: sdma_tms_p1_0 {
474				pinmux = <MAX32_PINMUX(1, 0, AF3)>;
475			};
476
477			/omit-if-no-ref/ pt0_p1_0: pt0_p1_0 {
478				pinmux = <MAX32_PINMUX(1, 0, AF4)>;
479			};
480
481			/omit-if-no-ref/ sdhc_cmd_p1_1: sdhc_cmd_p1_1 {
482				pinmux = <MAX32_PINMUX(1, 1, AF1)>;
483			};
484
485			/omit-if-no-ref/ sdma_tdo_p1_1: sdma_tdo_p1_1 {
486				pinmux = <MAX32_PINMUX(1, 1, AF3)>;
487			};
488
489			/omit-if-no-ref/ pt1_p1_1: pt1_p1_1 {
490				pinmux = <MAX32_PINMUX(1, 1, AF4)>;
491			};
492
493			/omit-if-no-ref/ sdhc_dat0_p1_2: sdhc_dat0_p1_2 {
494				pinmux = <MAX32_PINMUX(1, 2, AF1)>;
495			};
496
497			/omit-if-no-ref/ sdma_tdi_p1_2: sdma_tdi_p1_2 {
498				pinmux = <MAX32_PINMUX(1, 2, AF3)>;
499			};
500
501			/omit-if-no-ref/ pt2_p1_2: pt2_p1_2 {
502				pinmux = <MAX32_PINMUX(1, 2, AF4)>;
503			};
504
505			/omit-if-no-ref/ sdhc_clk_p1_3: sdhc_clk_p1_3 {
506				pinmux = <MAX32_PINMUX(1, 3, AF1)>;
507			};
508
509			/omit-if-no-ref/ sdma_tck_p1_3: sdma_tck_p1_3 {
510				pinmux = <MAX32_PINMUX(1, 3, AF3)>;
511			};
512
513			/omit-if-no-ref/ pt3_p1_3: pt3_p1_3 {
514				pinmux = <MAX32_PINMUX(1, 3, AF4)>;
515			};
516
517			/omit-if-no-ref/ sdhc_dat1_p1_4: sdhc_dat1_p1_4 {
518				pinmux = <MAX32_PINMUX(1, 4, AF1)>;
519			};
520
521			/omit-if-no-ref/ uart0_rx_p1_4: uart0_rx_p1_4 {
522				pinmux = <MAX32_PINMUX(1, 4, AF3)>;
523			};
524
525			/omit-if-no-ref/ pt5_p1_4: pt5_p1_4 {
526				pinmux = <MAX32_PINMUX(1, 4, AF4)>;
527			};
528
529			/omit-if-no-ref/ sdhc_dat2_p1_5: sdhc_dat2_p1_5 {
530				pinmux = <MAX32_PINMUX(1, 5, AF1)>;
531			};
532
533			/omit-if-no-ref/ uart0_tx_p1_5: uart0_tx_p1_5 {
534				pinmux = <MAX32_PINMUX(1, 5, AF3)>;
535			};
536
537			/omit-if-no-ref/ pt5_p1_5: pt5_p1_5 {
538				pinmux = <MAX32_PINMUX(1, 5, AF4)>;
539			};
540
541			/omit-if-no-ref/ sdhc_wp_p1_6: sdhc_wp_p1_6 {
542				pinmux = <MAX32_PINMUX(1, 6, AF1)>;
543			};
544
545			/omit-if-no-ref/ uart0_cts_p1_6: uart0_cts_p1_6 {
546				pinmux = <MAX32_PINMUX(1, 6, AF3)>;
547			};
548
549			/omit-if-no-ref/ pt6_p1_6: pt6_p1_6 {
550				pinmux = <MAX32_PINMUX(1, 6, AF4)>;
551			};
552
553			/omit-if-no-ref/ sdhc_cdn_p1_7: sdhc_cdn_p1_7 {
554				pinmux = <MAX32_PINMUX(1, 7, AF1)>;
555			};
556
557			/omit-if-no-ref/ uart0_rts_p1_7: uart0_rts_p1_7 {
558				pinmux = <MAX32_PINMUX(1, 7, AF3)>;
559			};
560
561			/omit-if-no-ref/ pt7_p1_7: pt7_p1_7 {
562				pinmux = <MAX32_PINMUX(1, 7, AF4)>;
563			};
564
565			/omit-if-no-ref/ spi0_ss0_p1_8: spi0_ss0_p1_8 {
566				pinmux = <MAX32_PINMUX(1, 8, AF1)>;
567			};
568
569			/omit-if-no-ref/ pt8_p1_8: pt8_p1_8 {
570				pinmux = <MAX32_PINMUX(1, 8, AF4)>;
571			};
572
573			/omit-if-no-ref/ spi0_mosi_p1_9: spi0_mosi_p1_9 {
574				pinmux = <MAX32_PINMUX(1, 9, AF1)>;
575			};
576
577			/omit-if-no-ref/ pt9_p1_9: pt9_p1_9 {
578				pinmux = <MAX32_PINMUX(1, 9, AF4)>;
579			};
580
581			/omit-if-no-ref/ spi0_miso_p1_10: spi0_miso_p1_10 {
582				pinmux = <MAX32_PINMUX(1, 10, AF1)>;
583			};
584
585			/omit-if-no-ref/ pt10_p1_10: pt10_p1_10 {
586				pinmux = <MAX32_PINMUX(1, 10, AF4)>;
587			};
588
589			/omit-if-no-ref/ spi0_sck_p1_11: spi0_sck_p1_11 {
590				pinmux = <MAX32_PINMUX(1, 11, AF1)>;
591			};
592
593			/omit-if-no-ref/ pt11_p1_11: pt11_p1_11 {
594				pinmux = <MAX32_PINMUX(1, 11, AF4)>;
595			};
596
597			/omit-if-no-ref/ spi0_sdio2_p1_12: spi0_sdio2_p1_12 {
598				pinmux = <MAX32_PINMUX(1, 12, AF1)>;
599			};
600
601			/omit-if-no-ref/ uart1_rx_p1_12: uart1_rx_p1_12 {
602				pinmux = <MAX32_PINMUX(1, 12, AF3)>;
603			};
604
605			/omit-if-no-ref/ pt12_p1_12: pt12_p1_12 {
606				pinmux = <MAX32_PINMUX(1, 12, AF4)>;
607			};
608
609			/omit-if-no-ref/ spi0_sdio3_p1_13: spi0_sdio3_p1_13 {
610				pinmux = <MAX32_PINMUX(1, 13, AF1)>;
611			};
612
613			/omit-if-no-ref/ uart1_tx_p1_13: uart1_tx_p1_13 {
614				pinmux = <MAX32_PINMUX(1, 13, AF3)>;
615			};
616
617			/omit-if-no-ref/ pt13_p1_13: pt13_p1_13 {
618				pinmux = <MAX32_PINMUX(1, 13, AF4)>;
619			};
620
621			/omit-if-no-ref/ i2c2_scl_p1_14: i2c2_scl_p1_14 {
622				pinmux = <MAX32_PINMUX(1, 14, AF1)>;
623			};
624
625			/omit-if-no-ref/ uart1_cts_p1_14: uart1_cts_p1_14 {
626				pinmux = <MAX32_PINMUX(1, 14, AF3)>;
627			};
628
629			/omit-if-no-ref/ pt14_p1_14: pt14_p1_14 {
630				pinmux = <MAX32_PINMUX(1, 14, AF4)>;
631			};
632
633			/omit-if-no-ref/ i2c2_sda_p1_15: i2c2_sda_p1_15 {
634				pinmux = <MAX32_PINMUX(1, 15, AF1)>;
635			};
636
637			/omit-if-no-ref/ uart1_rts_p1_15: uart1_rts_p1_15 {
638				pinmux = <MAX32_PINMUX(1, 15, AF3)>;
639			};
640
641			/omit-if-no-ref/ pt15_p1_15: pt15_p1_15 {
642				pinmux = <MAX32_PINMUX(1, 15, AF4)>;
643			};
644		};
645	};
646};
647