1 /*
2 * Copyright (c) 2021 NXP
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #define DT_DRV_COMPAT nxp_os_timer
8
9 #include <limits.h>
10
11 #include <zephyr/init.h>
12 #include <zephyr/drivers/timer/system_timer.h>
13 #include <zephyr/irq.h>
14 #include <zephyr/sys_clock.h>
15 #include <zephyr/spinlock.h>
16 #include <zephyr/drivers/counter.h>
17 #include <zephyr/pm/pm.h>
18 #include "fsl_ostimer.h"
19 #ifndef CONFIG_SOC_MCXN236
20 #include "fsl_power.h"
21 #endif
22
23 #define CYC_PER_TICK ((uint32_t)((uint64_t)sys_clock_hw_cycles_per_sec() \
24 / (uint64_t)CONFIG_SYS_CLOCK_TICKS_PER_SEC))
25 #define MAX_CYC INT_MAX
26 #define MAX_TICKS ((MAX_CYC - CYC_PER_TICK) / CYC_PER_TICK)
27 #define MIN_DELAY 1000
28
29 #define TICKLESS IS_ENABLED(CONFIG_TICKLESS_KERNEL)
30
31 static struct k_spinlock lock;
32 static uint64_t last_count;
33 static OSTIMER_Type *base;
34 /* Total cycles of the timer compensated to include the time lost in "sleep/deep sleep" modes.
35 * This maintains the timer count to account for the case if the OS Timer is reset in
36 * certain deep sleep modes and the time elapsed when it is powered off.
37 */
38 static uint64_t cyc_sys_compensated;
39 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(standby)) && CONFIG_PM
40 static const struct device *counter_dev;
41 #endif
42
mcux_lpc_ostick_get_compensated_timer_value(void)43 static uint64_t mcux_lpc_ostick_get_compensated_timer_value(void)
44 {
45 return (OSTIMER_GetCurrentTimerValue(base) + cyc_sys_compensated);
46 }
47
mcux_lpc_ostick_isr(const void * arg)48 void mcux_lpc_ostick_isr(const void *arg)
49 {
50 ARG_UNUSED(arg);
51
52 k_spinlock_key_t key = k_spin_lock(&lock);
53 uint64_t now = mcux_lpc_ostick_get_compensated_timer_value();
54 uint32_t dticks = (uint32_t)((now - last_count) / CYC_PER_TICK);
55
56 /* Clear interrupt flag by writing 1. */
57 base->OSEVENT_CTRL &= ~OSTIMER_OSEVENT_CTRL_OSTIMER_INTENA_MASK;
58
59 last_count += dticks * CYC_PER_TICK;
60
61 if (!TICKLESS) {
62 uint64_t next = last_count + CYC_PER_TICK;
63
64 if ((int64_t)(next - now) < MIN_DELAY) {
65 next += CYC_PER_TICK;
66 }
67 OSTIMER_SetMatchValue(base, next, NULL);
68 }
69
70 k_spin_unlock(&lock, key);
71 sys_clock_announce(IS_ENABLED(CONFIG_TICKLESS_KERNEL) ? dticks : 1);
72 }
73
74 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(standby)) && CONFIG_PM
75
76 /* The OS Timer is disabled in certain low power modes and cannot wakeup the system
77 * on timeout. This function will be called by the low power code to allow the
78 * OS Timer to save off the count if needed and also start a wakeup counter
79 * that would wakeup the system from deep power down modes.
80 */
mcux_lpc_ostick_set_counter_timeout(int32_t curr_timeout)81 static uint32_t mcux_lpc_ostick_set_counter_timeout(int32_t curr_timeout)
82 {
83 uint32_t ret = 0;
84
85 if (counter_dev) {
86 uint32_t timeout;
87 int32_t ticks;
88 struct counter_top_cfg top_cfg = { 0 };
89
90 timeout = k_ticks_to_us_ceil32(curr_timeout);
91
92 ticks = counter_us_to_ticks(counter_dev, timeout);
93 ticks = CLAMP(ticks, 1, counter_get_max_top_value(counter_dev));
94
95 top_cfg.ticks = ticks;
96 top_cfg.callback = NULL;
97 top_cfg.user_data = NULL;
98 top_cfg.flags = 0;
99 if (counter_set_top_value(counter_dev, &top_cfg) != 0) {
100 /* Setting top value failed, try setting an alarm */
101 struct counter_alarm_cfg alarm_cfg;
102
103 alarm_cfg.ticks = ticks;
104 alarm_cfg.callback = NULL;
105 alarm_cfg.user_data = NULL;
106 alarm_cfg.flags = 0;
107
108 if (counter_set_channel_alarm(counter_dev, 0, &alarm_cfg) != 0) {
109 ret = 1;
110 goto done;
111 }
112 }
113
114 #if CONFIG_MCUX_OS_TIMER_PM_POWERED_OFF
115 /* Capture the current timer value for cases where it loses its state
116 * in low power modes.
117 */
118 cyc_sys_compensated += OSTIMER_GetCurrentTimerValue(base);
119 #endif
120
121 /* Counter is set to wakeup the system after the requested time */
122 if (counter_start(counter_dev) != 0) {
123 ret = 1;
124 }
125 } else {
126 ret = 1;
127 }
128
129 done:
130 return ret;
131 }
132
133 /* After exit from certain low power modes where the OS Timer was disabled, the
134 * current tick value should be updated to account for the period when the OS Timer
135 * was disabled. Also in certain cases, the OS Timer might lose its state and needs
136 * to be reinitialized.
137 */
mcux_lpc_ostick_compensate_system_timer(void)138 static uint32_t mcux_lpc_ostick_compensate_system_timer(void)
139 {
140 uint32_t ret = 0;
141
142 if (counter_dev) {
143 uint32_t slept_time_ticks;
144 uint32_t slept_time_us;
145
146 counter_stop(counter_dev);
147
148 counter_get_value(counter_dev, &slept_time_ticks);
149
150 if (!(counter_is_counting_up(counter_dev))) {
151 slept_time_ticks = counter_get_top_value(counter_dev) - slept_time_ticks;
152 }
153 slept_time_us = counter_ticks_to_us(counter_dev, slept_time_ticks);
154 cyc_sys_compensated += (k_us_to_ticks_floor32(slept_time_us) * CYC_PER_TICK);
155
156 #if CONFIG_MCUX_OS_TIMER_PM_POWERED_OFF
157 /* Reactivate os_timer for cases where it loses its state */
158 OSTIMER_Init(base);
159 #endif
160
161 /* Announce the time slept to the kernel*/
162 mcux_lpc_ostick_isr(NULL);
163 } else {
164 ret = 1;
165 }
166
167 return ret;
168 }
169
170 #endif
171
sys_clock_set_timeout(int32_t ticks,bool idle)172 void sys_clock_set_timeout(int32_t ticks, bool idle)
173 {
174 ARG_UNUSED(idle);
175
176 if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
177 /* Only for tickless kernel system */
178 return;
179 }
180
181 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(standby)) && CONFIG_PM
182 if (idle) {
183 /* OS Timer may not be able to wakeup in certain low power modes.
184 * For these cases, we start a counter that can wakeup
185 * from low power modes.
186 */
187 if (pm_state_next_get(0)->state == PM_STATE_STANDBY) {
188 if (mcux_lpc_ostick_set_counter_timeout(ticks) == 0) {
189 /* A low power counter has been started. No need to
190 * go further, simply return
191 */
192 return;
193 }
194 }
195 }
196 #endif
197
198 ticks = ticks == K_TICKS_FOREVER ? MAX_TICKS : ticks;
199 ticks = CLAMP(ticks - 1, 0, (int32_t)MAX_TICKS);
200
201 k_spinlock_key_t key = k_spin_lock(&lock);
202 uint64_t now = mcux_lpc_ostick_get_compensated_timer_value();
203 uint32_t adj, cyc = ticks * CYC_PER_TICK;
204
205 /* Round up to next tick boundary. */
206 adj = (uint32_t)(now - last_count) + (CYC_PER_TICK - 1);
207 if (cyc <= MAX_CYC - adj) {
208 cyc += adj;
209 } else {
210 cyc = MAX_CYC;
211 }
212 cyc = (cyc / CYC_PER_TICK) * CYC_PER_TICK;
213
214 if ((int32_t)(cyc + last_count - now) < MIN_DELAY) {
215 cyc += CYC_PER_TICK;
216 }
217
218 OSTIMER_SetMatchValue(base, cyc + last_count - cyc_sys_compensated, NULL);
219
220 k_spin_unlock(&lock, key);
221 }
222
sys_clock_elapsed(void)223 uint32_t sys_clock_elapsed(void)
224 {
225 if (!IS_ENABLED(CONFIG_TICKLESS_KERNEL)) {
226 /* Always return 0 for tickful kernel system */
227 return 0;
228 }
229
230 k_spinlock_key_t key = k_spin_lock(&lock);
231 uint32_t ret = ((uint32_t)mcux_lpc_ostick_get_compensated_timer_value() -
232 (uint32_t)last_count) / CYC_PER_TICK;
233
234 k_spin_unlock(&lock, key);
235 return ret;
236 }
237
sys_clock_cycle_get_32(void)238 uint32_t sys_clock_cycle_get_32(void)
239 {
240 return (uint32_t)mcux_lpc_ostick_get_compensated_timer_value();
241 }
242
sys_clock_cycle_get_64(void)243 uint64_t sys_clock_cycle_get_64(void)
244 {
245 return mcux_lpc_ostick_get_compensated_timer_value();
246 }
247
sys_clock_idle_exit(void)248 void sys_clock_idle_exit(void)
249 {
250 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(standby)) && CONFIG_PM
251 /* The tick should be compensated for states where the
252 * OS Timer is disabled
253 */
254 if (pm_state_next_get(0)->state == PM_STATE_STANDBY) {
255 mcux_lpc_ostick_compensate_system_timer();
256 }
257 #endif
258 }
259
sys_clock_driver_init(void)260 static int sys_clock_driver_init(void)
261 {
262
263 /* Configure event timer's ISR */
264 IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority),
265 mcux_lpc_ostick_isr, NULL, 0);
266
267 base = (OSTIMER_Type *)DT_INST_REG_ADDR(0);
268
269 #if (DT_INST_PROP(0, wakeup_source))
270 EnableDeepSleepIRQ(DT_INST_IRQN(0));
271 #endif
272
273 /* Initialize the OS timer, setting clock configuration. */
274 OSTIMER_Init(base);
275
276 last_count = mcux_lpc_ostick_get_compensated_timer_value();
277 OSTIMER_SetMatchValue(base, last_count + CYC_PER_TICK, NULL);
278
279 /* Enable event timer interrupt */
280 irq_enable(DT_INST_IRQN(0));
281
282 /* On some SoC's, OS Timer cannot wakeup from low power mode in standby modes */
283 #if DT_NODE_HAS_STATUS_OKAY(DT_NODELABEL(standby)) && CONFIG_PM
284 counter_dev = DEVICE_DT_GET_OR_NULL(DT_INST_PHANDLE(0, deep_sleep_counter));
285 #endif
286
287 return 0;
288 }
289
290 SYS_INIT(sys_clock_driver_init, PRE_KERNEL_2,
291 CONFIG_SYSTEM_CLOCK_INIT_PRIORITY);
292
