1# SPDX-License-Identifier: Apache-2.0
2
3menuconfig UART_NS16550
4	bool "NS16550 serial driver"
5	default y
6	depends on DT_HAS_NS16550_ENABLED
7	select SERIAL_HAS_DRIVER
8	select SERIAL_SUPPORT_INTERRUPT
9	select PINCTRL if $(dt_compat_any_has_prop,$(DT_COMPAT_NS16550),pinctrl-0)
10	help
11	  This option enables the NS16550 serial driver.
12	  This driver can be used for the serial hardware
13	  available on x86 boards.
14
15if UART_NS16550
16
17config UART_NS16550_LINE_CTRL
18	bool "Serial Line Control for Apps"
19	depends on UART_LINE_CTRL
20	help
21	  This enables the API for apps to control the serial line,
22	  such as CTS and RTS.
23
24	  Says n if not sure.
25
26config UART_NS16550_DRV_CMD
27	bool "Driver Commands"
28	depends on UART_DRV_CMD
29	help
30	  This enables the API for apps to send commands to driver.
31
32	  Says n if not sure.
33
34config UART_NS16550_INTEL_LPSS_DMA
35	bool "INTEL LPSS support for NS16550"
36	select SERIAL_SUPPORT_ASYNC
37	select DMA if UART_ASYNC_API
38	help
39	  This enables the usage of INTEL LPSS internal DMA for Async operations.
40
41choice UART_NS16550_VARIANT
42	prompt "UART variant"
43	default UART_NS16550_VARIANT_NS16550
44	help
45	  Select UART device variant
46
47config UART_NS16550_VARIANT_NS16550
48	bool "UART 16550 (16-bytes FIFO)"
49	help
50	  This enables support for 16-bytes FIFO if UART controller is 16550.
51
52config UART_NS16550_VARIANT_NS16750
53	bool "UART 16750 (64-bytes FIFO and auto flow control)"
54	help
55	  This enables support for 64-bytes FIFO and automatic hardware
56	  flow control if UART controller is 16750.
57
58config UART_NS16550_VARIANT_NS16950
59	bool "UART 16950 (128-bytes FIFO and auto flow control)"
60	help
61	  This enables support for 128-bytes FIFO and automatic hardware flow control.
62endchoice
63
64config UART_NS16550_ACCESS_WORD_ONLY
65	bool "NS16550 only allows word access"
66	help
67	  In some case, e.g. ARC HS Development kit, the peripheral space of ns
68	  16550 (DesignWare UART) only allows word access, byte access will raise
69	  exception.
70
71config UART_NS16550_TI_K3
72	bool "Add support for NS16550 variant specific to TI K3 SoCs"
73	select PINCTRL
74	help
75	  Enabling this configuration allows the users to use the UART port in
76	  Texas Instruments K3 SoCs by enabling a vendor specific extended register
77	  set.
78
79config UART_NS16550_DW8250_DW_APB
80	bool "Synopsys DesignWare 8250"
81	help
82	  This enables support for Synopsys DesignWare 8250 UART controller.
83
84config UART_NS16550_ITE_HIGH_SPEED_BAUDRATE
85	bool "IT8XXX2 specific baud rate configuration"
86	help
87	  Enable IT8XXX2 specific baud rate configuration.
88	  This applies to high-speed baud rate configuration.
89
90menu "NS16550 Workarounds"
91
92config UART_NS16550_WA_ISR_REENABLE_INTERRUPT
93	bool "Re-enable interrupts by toggling IER at end of ISR"
94	depends on UART_INTERRUPT_DRIVEN
95	help
96	  In some configurations (e.g. edge interrupt triggers),
97	  an interruptible event occurs during ISR and the host interrupt
98	  controller does not see the new event due to IIR is constantly
99	  asserting interrupts. For example, the callback handles RX and
100	  then TX. If another character comes in before end of TX processing
101	  (TX interrupt still asserts while raising RX interrupt), the host
102	  interrupt controller may not see this new event. So if needed,
103	  the IER is being toggled to re-assert interrupts at the end of ISR
104	  to nudge the host interrupt controller to fire the ISR again.
105
106endmenu
107
108endif # UART_NS16550
109