1 /*
2 * Copyright (c) 2019 Peter Bigot Consulting, LLC
3 * Copyright (c) 2024 Vogl Electronic GmbH
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8 #include <errno.h>
9 #include <zephyr/kernel.h>
10 #include <zephyr/drivers/i2c.h>
11 #include <zephyr/sys/byteorder.h>
12 #include <zephyr/sys/__assert.h>
13 #include <zephyr/logging/log.h>
14 #include "jc42.h"
15
16 LOG_MODULE_DECLARE(JC42, CONFIG_SENSOR_LOG_LEVEL);
17
jc42_attr_set(const struct device * dev,enum sensor_channel chan,enum sensor_attribute attr,const struct sensor_value * val)18 int jc42_attr_set(const struct device *dev, enum sensor_channel chan,
19 enum sensor_attribute attr,
20 const struct sensor_value *val)
21 {
22 const struct jc42_config *cfg = dev->config;
23 uint8_t reg_addr;
24 int temp;
25
26 __ASSERT_NO_MSG(chan == SENSOR_CHAN_AMBIENT_TEMP);
27
28 if (!cfg->int_gpio.port) {
29 return -ENOTSUP;
30 }
31
32 switch (attr) {
33 case SENSOR_ATTR_LOWER_THRESH:
34 reg_addr = JC42_REG_LOWER_LIMIT;
35 break;
36 case SENSOR_ATTR_UPPER_THRESH:
37 reg_addr = JC42_REG_UPPER_LIMIT;
38 break;
39 default:
40 return -EINVAL;
41 }
42
43 /* Convert temperature to a signed scaled value, then write
44 * the 12-bit 2s complement-plus-sign-bit register value.
45 */
46 temp = val->val1 * JC42_TEMP_SCALE_CEL;
47 temp += (JC42_TEMP_SCALE_CEL * val->val2) / 1000000;
48
49 return jc42_reg_write_16bit(dev, reg_addr,
50 jc42_temp_reg_from_signed(temp));
51 }
52
setup_int(const struct device * dev,bool enable)53 static inline void setup_int(const struct device *dev,
54 bool enable)
55 {
56 const struct jc42_config *cfg = dev->config;
57 unsigned int flags = enable
58 ? GPIO_INT_EDGE_TO_ACTIVE
59 : GPIO_INT_DISABLE;
60
61 gpio_pin_interrupt_configure_dt(&cfg->int_gpio, flags);
62 }
63
handle_int(const struct device * dev)64 static void handle_int(const struct device *dev)
65 {
66 struct jc42_data *data = dev->data;
67
68 setup_int(dev, false);
69
70 #if defined(CONFIG_JC42_TRIGGER_OWN_THREAD)
71 k_sem_give(&data->sem);
72 #elif defined(CONFIG_JC42_TRIGGER_GLOBAL_THREAD)
73 k_work_submit(&data->work);
74 #endif
75 }
76
process_int(const struct device * dev)77 static void process_int(const struct device *dev)
78 {
79 struct jc42_data *data = dev->data;
80
81 if (data->trigger_handler) {
82 data->trigger_handler(dev, data->trig);
83 }
84
85 if (data->trigger_handler) {
86 setup_int(dev, true);
87 }
88 }
89
jc42_trigger_set(const struct device * dev,const struct sensor_trigger * trig,sensor_trigger_handler_t handler)90 int jc42_trigger_set(const struct device *dev,
91 const struct sensor_trigger *trig,
92 sensor_trigger_handler_t handler)
93 {
94 struct jc42_data *data = dev->data;
95 const struct jc42_config *cfg = dev->config;
96 int rv = 0;
97
98 if (!cfg->int_gpio.port) {
99 return -ENOTSUP;
100 }
101
102 setup_int(dev, false);
103
104 data->trig = trig;
105 data->trigger_handler = handler;
106
107 if (handler != NULL) {
108 setup_int(dev, true);
109
110 rv = gpio_pin_get_dt(&cfg->int_gpio);
111 if (rv > 0) {
112 handle_int(dev);
113 rv = 0;
114 }
115 }
116
117 return rv;
118 }
119
alert_cb(const struct device * dev,struct gpio_callback * cb,uint32_t pins)120 static void alert_cb(const struct device *dev, struct gpio_callback *cb,
121 uint32_t pins)
122 {
123 struct jc42_data *data =
124 CONTAINER_OF(cb, struct jc42_data, alert_cb);
125
126 ARG_UNUSED(pins);
127
128 handle_int(data->dev);
129 }
130
131 #ifdef CONFIG_JC42_TRIGGER_OWN_THREAD
132
jc42_thread_main(void * p1,void * p2,void * p3)133 static void jc42_thread_main(void *p1, void *p2, void *p3)
134 {
135 ARG_UNUSED(p2);
136 ARG_UNUSED(p3);
137
138 struct jc42_data *data = p1;
139
140 while (true) {
141 k_sem_take(&data->sem, K_FOREVER);
142 process_int(data->dev);
143 }
144 }
145
146 static K_KERNEL_STACK_DEFINE(jc42_thread_stack, CONFIG_JC42_THREAD_STACK_SIZE);
147 static struct k_thread jc42_thread;
148 #else /* CONFIG_JC42_TRIGGER_GLOBAL_THREAD */
149
jc42_gpio_thread_cb(struct k_work * work)150 static void jc42_gpio_thread_cb(struct k_work *work)
151 {
152 struct jc42_data *data =
153 CONTAINER_OF(work, struct jc42_data, work);
154
155 process_int(data->dev);
156 }
157
158 #endif /* CONFIG_JC42_TRIGGER_GLOBAL_THREAD */
159
jc42_setup_interrupt(const struct device * dev)160 int jc42_setup_interrupt(const struct device *dev)
161 {
162 struct jc42_data *data = dev->data;
163 const struct jc42_config *cfg = dev->config;
164 int rc = jc42_reg_write_16bit(dev, JC42_REG_CRITICAL,
165 JC42_TEMP_ABS_MASK);
166 if (rc == 0) {
167 rc = jc42_reg_write_16bit(dev, JC42_REG_CONFIG,
168 JC42_CFG_ALERT_ENA);
169 }
170
171 data->dev = dev;
172
173 #ifdef CONFIG_JC42_TRIGGER_OWN_THREAD
174 k_sem_init(&data->sem, 0, K_SEM_MAX_LIMIT);
175
176 k_thread_create(&jc42_thread, jc42_thread_stack,
177 CONFIG_JC42_THREAD_STACK_SIZE,
178 jc42_thread_main, data, NULL, NULL,
179 K_PRIO_COOP(CONFIG_JC42_THREAD_PRIORITY),
180 0, K_NO_WAIT);
181 #else /* CONFIG_JC42_TRIGGER_GLOBAL_THREAD */
182 data->work.handler = jc42_gpio_thread_cb;
183 #endif /* trigger type */
184
185 if (!gpio_is_ready_dt(&cfg->int_gpio)) {
186 LOG_ERR("GPIO device not ready");
187 return -ENODEV;
188 }
189
190 if (rc == 0) {
191 rc = gpio_pin_configure_dt(&cfg->int_gpio, GPIO_INPUT);
192 }
193
194 if (rc == 0) {
195 gpio_init_callback(&data->alert_cb, alert_cb, BIT(cfg->int_gpio.pin));
196
197 rc = gpio_add_callback(cfg->int_gpio.port, &data->alert_cb);
198 }
199
200 return rc;
201 }
202
