1# Copyright (c) 2021 Tokita, Hiroshi <tokita.hiroshi@gmail.com>
2# SPDX-License-Identifier: Apache-2.0
3
4config NUCLEI_ECLIC
5	bool "Enhanced Core Local Interrupt Controller (ECLIC)"
6	default y
7	depends on DT_HAS_NUCLEI_ECLIC_ENABLED
8	select RISCV_SOC_HAS_CUSTOM_IRQ_HANDLING
9	select CLIC_SMCLICSHV_EXT if RISCV_VECTORED_MODE
10	help
11	  Interrupt controller for Nuclei SoC core.
12
13config NRFX_CLIC
14	bool "VPR Core Local Interrpt Controller (CLIC)"
15	default y
16	depends on DT_HAS_NORDIC_NRF_CLIC_ENABLED
17	select GEN_IRQ_VECTOR_TABLE
18	help
19	  Interrupt controller for Nordic VPR cores.
20
21config CLIC_SMCLICSHV_EXT
22	bool
23	help
24	  The selective hardware vectoring extension gives users the flexibility
25	  to select the behavior for each interrupt. The CLIC driver needs to
26	  implement the riscv_clic_irq_vector_set() function.
27
28if NUCLEI_ECLIC
29
30config LEGACY_CLIC
31	bool "Use the legacy clic specification"
32	depends on RISCV_HAS_CLIC
33	help
34	  Enables legacy clic, where smclicshv extension is not supported and
35	  hardware vectoring is set via mode bits of mtvec.
36
37endif # NUCLEI_ECLIC
38