1 /*
2 * Copyright (c) 2018 Alexander Wachter
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #include <soc.h>
8 #include <zephyr/drivers/hwinfo.h>
9 #include <string.h>
10 #include <zephyr/sys/byteorder.h>
11 #if !defined(CONFIG_SOC_SERIES_NRF54HX) && !defined(CONFIG_BOARD_QEMU_CORTEX_M0)
12 #include <helpers/nrfx_reset_reason.h>
13 #endif
14
15 #if defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) && defined(NRF_FICR_S)
16 #include <soc_secure.h>
17 #else
18 #include <hal/nrf_ficr.h>
19 #endif
20
21 struct nrf_uid {
22 uint32_t id[2];
23 };
24
z_impl_hwinfo_get_device_id(uint8_t * buffer,size_t length)25 ssize_t z_impl_hwinfo_get_device_id(uint8_t *buffer, size_t length)
26 {
27 struct nrf_uid dev_id;
28 uint32_t buf[2];
29
30 #if NRF_FICR_HAS_DEVICE_ID || NRF_FICR_HAS_INFO_DEVICE_ID
31 /* DEVICEID is accessible, use this */
32 #if defined(CONFIG_TRUSTED_EXECUTION_NONSECURE) && defined(NRF_FICR_S)
33 soc_secure_read_deviceid(buf);
34 #else
35 buf[0] = nrf_ficr_deviceid_get(NRF_FICR, 0);
36 buf[1] = nrf_ficr_deviceid_get(NRF_FICR, 1);
37 #endif
38 #elif NRF_FICR_HAS_DEVICE_ADDR || NRF_FICR_HAS_BLE_ADDR
39 /* DEVICEID is not accessible, use device/ble address instead.
40 * Assume that it is always accessible from the non-secure image.
41 */
42 buf[0] = nrf_ficr_deviceaddr_get(NRF_FICR, 0);
43 buf[1] = nrf_ficr_deviceaddr_get(NRF_FICR, 1);
44
45 /* Assume that ER and IR are available whenever deviceaddr is.
46 * Use the LSBytes from ER and IR to complete the device id.
47 */
48 buf[1] |= (nrf_ficr_er_get(NRF_FICR, 0) & 0xFF) << 16;
49 buf[1] |= (nrf_ficr_ir_get(NRF_FICR, 0) & 0xFF) << 24;
50 #else
51 #error "No suitable source for hwinfo device_id generation"
52 #endif
53
54 dev_id.id[0] = sys_cpu_to_be32(buf[1]);
55 dev_id.id[1] = sys_cpu_to_be32(buf[0]);
56
57 if (length > sizeof(dev_id.id)) {
58 length = sizeof(dev_id.id);
59 }
60
61 memcpy(buffer, dev_id.id, length);
62
63 return length;
64 }
65
66 #if !defined(CONFIG_SOC_SERIES_NRF54HX) && !defined(CONFIG_BOARD_QEMU_CORTEX_M0)
z_impl_hwinfo_get_reset_cause(uint32_t * cause)67 int z_impl_hwinfo_get_reset_cause(uint32_t *cause)
68 {
69 uint32_t flags = 0;
70
71 uint32_t reason = nrfx_reset_reason_get();
72
73 if (reason & NRFX_RESET_REASON_RESETPIN_MASK) {
74 flags |= RESET_PIN;
75 }
76 if (reason & NRFX_RESET_REASON_DOG_MASK) {
77 flags |= RESET_WATCHDOG;
78 }
79 if (reason & NRFX_RESET_REASON_LOCKUP_MASK) {
80 flags |= RESET_CPU_LOCKUP;
81 }
82 if (reason & NRFX_RESET_REASON_OFF_MASK) {
83 flags |= RESET_LOW_POWER_WAKE;
84 }
85 if (reason & NRFX_RESET_REASON_DIF_MASK) {
86 flags |= RESET_DEBUG;
87 }
88 if (reason & NRFX_RESET_REASON_SREQ_MASK) {
89 flags |= RESET_SOFTWARE;
90 }
91
92 #if NRFX_RESET_REASON_HAS_CTRLAP
93 if (reason & NRFX_RESET_REASON_CTRLAP_MASK) {
94 flags |= RESET_DEBUG;
95 }
96 #endif
97 #if NRFX_RESET_REASON_HAS_LPCOMP
98 if (reason & NRFX_RESET_REASON_LPCOMP_MASK) {
99 flags |= RESET_LOW_POWER_WAKE;
100 }
101 #endif
102 #if NRFX_RESET_REASON_HAS_NFC
103 if (reason & NRFX_RESET_REASON_NFC_MASK) {
104 flags |= RESET_LOW_POWER_WAKE;
105 }
106 #endif
107 #if NRFX_RESET_REASON_HAS_VBUS
108 if (reason & NRFX_RESET_REASON_VBUS_MASK) {
109 flags |= RESET_POR;
110 }
111 #endif
112 #if NRFX_RESET_REASON_HAS_CTRLAPSOFT
113 if (reason & NRFX_RESET_REASON_CTRLAPSOFT_MASK) {
114 flags |= RESET_DEBUG;
115 }
116 #endif
117 #if NRFX_RESET_REASON_HAS_CTRLAPHARD
118 if (reason & NRFX_RESET_REASON_CTRLAPHARD_MASK) {
119 flags |= RESET_DEBUG;
120 }
121 #endif
122 #if NRFX_RESET_REASON_HAS_CTRLAPPIN
123 if (reason & NRFX_RESET_REASON_CTRLAPPIN_MASK) {
124 flags |= RESET_DEBUG;
125 }
126 #endif
127 #if !NRF_POWER_HAS_RESETREAS
128 if (reason & NRFX_RESET_REASON_DOG1_MASK) {
129 flags |= RESET_WATCHDOG;
130 }
131 #endif
132 #if NRFX_RESET_REASON_HAS_GRTC
133 if (reason & NRFX_RESET_REASON_GRTC_MASK) {
134 flags |= RESET_CLOCK;
135 }
136 #endif
137 #if NRFX_RESET_REASON_HAS_NETWORK
138 if (reason & NRFX_RESET_REASON_LSREQ_MASK) {
139 flags |= RESET_SOFTWARE;
140 }
141 if (reason & NRFX_RESET_REASON_LLOCKUP_MASK) {
142 flags |= RESET_CPU_LOCKUP;
143 }
144 if (reason & NRFX_RESET_REASON_LDOG_MASK) {
145 flags |= RESET_WATCHDOG;
146 }
147 if (reason & NRFX_RESET_REASON_LCTRLAP_MASK) {
148 flags |= RESET_DEBUG;
149 }
150 #endif
151 #if defined(NRFX_RESET_REASON_TAMPC_MASK)
152 if (reason & NRFX_RESET_REASON_TAMPC_MASK) {
153 flags |= RESET_SECURITY;
154 }
155 #endif
156 #if defined(NRFX_RESET_REASON_SECTAMPER_MASK)
157 if (reason & NRFX_RESET_REASON_SECTAMPER_MASK) {
158 flags |= RESET_SECURITY;
159 }
160 #endif
161
162 *cause = flags;
163
164 return 0;
165 }
166
z_impl_hwinfo_clear_reset_cause(void)167 int z_impl_hwinfo_clear_reset_cause(void)
168 {
169 uint32_t reason = -1;
170
171 nrfx_reset_reason_clear(reason);
172
173 return 0;
174 }
175
z_impl_hwinfo_get_supported_reset_cause(uint32_t * supported)176 int z_impl_hwinfo_get_supported_reset_cause(uint32_t *supported)
177 {
178 *supported = (RESET_PIN
179 | RESET_WATCHDOG
180 | RESET_SOFTWARE
181 | RESET_CPU_LOCKUP
182 | RESET_LOW_POWER_WAKE
183 | RESET_DEBUG);
184
185 return 0;
186 }
187 #endif
188
