1 /*
2 * Copyright (c) 2024 Analog Devices Inc.
3 * Copyright (c) 2024 Baylibre SAS
4 *
5 * SPDX-License-Identifier: Apache-2.0
6 */
7
8 #include <zephyr/drivers/gpio.h>
9 #include <zephyr/drivers/spi.h>
10 #include <zephyr/kernel.h>
11 #include <zephyr/sys/byteorder.h>
12
13 #define LOG_LEVEL CONFIG_GPIO_LOG_LEVEL
14 #include <zephyr/logging/log.h>
15
16 LOG_MODULE_REGISTER(gpio_max14916);
17
18 #include <zephyr/drivers/gpio/gpio_utils.h>
19
20 #include "gpio_max14916.h"
21 #include "gpio_max149x6.h"
22
23 #define DT_DRV_COMPAT adi_max14916_gpio
24
25 static int gpio_max14916_diag_chan_get(const struct device *dev);
26
max14916_pars_spi_diag(const struct device * dev,uint8_t * rx_diag_buff,uint8_t rw)27 static int max14916_pars_spi_diag(const struct device *dev, uint8_t *rx_diag_buff, uint8_t rw)
28 {
29 struct max14916_data *data = dev->data;
30 int ret = 0;
31
32 if (rx_diag_buff[0]) {
33 LOG_ERR("[DIAG] MAX14916 in SPI diag - error detected");
34
35 data->glob.interrupt.reg_bits.SHT_VDD_FLT = MAX149X6_GET_BIT(rx_diag_buff[0], 5);
36 data->glob.interrupt.reg_bits.OW_ON_FLT = MAX149X6_GET_BIT(rx_diag_buff[0], 4);
37 data->glob.interrupt.reg_bits.OW_OFF_FLT = MAX149X6_GET_BIT(rx_diag_buff[0], 3);
38 data->glob.interrupt.reg_bits.CURR_LIM = MAX149X6_GET_BIT(rx_diag_buff[0], 2);
39 data->glob.interrupt.reg_bits.OVER_LD_FLT = MAX149X6_GET_BIT(rx_diag_buff[0], 1);
40
41 if (MAX149X6_GET_BIT(rx_diag_buff[0], 0)) {
42 LOG_ERR("[DIAG] MAX14916 in SPI diag - GLOBAL FAULT detected");
43 }
44
45 ret = -EIO;
46
47 PRINT_ERR(data->glob.interrupt.reg_bits.SHT_VDD_FLT);
48 PRINT_ERR(data->glob.interrupt.reg_bits.OW_ON_FLT);
49 PRINT_ERR(data->glob.interrupt.reg_bits.OW_OFF_FLT);
50 PRINT_ERR(data->glob.interrupt.reg_bits.CURR_LIM);
51 PRINT_ERR(data->glob.interrupt.reg_bits.OVER_LD_FLT);
52 }
53
54 if (rw == MAX149x6_WRITE && (rx_diag_buff[1] & 0x0f)) {
55 /* +-----------------------------------------------------------------------+
56 * | LSB BYTE 2 MSB |
57 * +--------+--------+--------+--------+--------+--------+--------+--------+
58 * | BIT0 | BIT1 | BIT2 | BIT3 | BIT4 | BIT5 | BIT6 | BIT7 |
59 * +--------+--------+--------+--------+--------+--------+--------+--------+
60 * | Fault1 | Fault2 | Fault3 | Fault4 | Fault5 | Fault6 | Fault7 | Fault8 |
61 * +--------+--------+--------+--------+--------+--------+--------+--------+
62 */
63
64 LOG_ERR("[DIAG] Flt1[%x] Flt2[%x] Flt3[%x]"
65 "Flt4[%x] Flt5[%x] Flt6[%x] Flt7[%x] Flt8[%x]\n",
66 MAX149X6_GET_BIT(rx_diag_buff[1], 0), MAX149X6_GET_BIT(rx_diag_buff[1], 1),
67 MAX149X6_GET_BIT(rx_diag_buff[1], 2), MAX149X6_GET_BIT(rx_diag_buff[1], 3),
68 MAX149X6_GET_BIT(rx_diag_buff[1], 4), MAX149X6_GET_BIT(rx_diag_buff[1], 5),
69 MAX149X6_GET_BIT(rx_diag_buff[1], 6), MAX149X6_GET_BIT(rx_diag_buff[1], 7));
70
71 if (rx_diag_buff[1]) {
72 LOG_ERR("[DIAG] gpio_max14916_diag_chan_get(%x)\n", rx_diag_buff[1] & 0x0f);
73 ret = gpio_max14916_diag_chan_get(dev);
74 }
75 }
76
77 return ret;
78 }
79
max14916_reg_trans_spi_diag(const struct device * dev,uint8_t addr,uint8_t tx,uint8_t rw)80 static int max14916_reg_trans_spi_diag(const struct device *dev, uint8_t addr, uint8_t tx,
81 uint8_t rw)
82 {
83 const struct max14916_config *config = dev->config;
84 uint8_t rx_diag_buff[2];
85
86 if (!gpio_pin_get_dt(&config->fault_gpio)) {
87 LOG_ERR(" >>> FLT PIN");
88 }
89
90 uint8_t ret = max149x6_reg_transceive(dev, addr, tx, rx_diag_buff, rw);
91
92 if (max14916_pars_spi_diag(dev, rx_diag_buff, rw)) {
93 ret = -EIO;
94 }
95
96 return ret;
97 }
98
99 #define MAX14916_REG_READ(dev, addr) max14916_reg_trans_spi_diag(dev, addr, 0, MAX149x6_READ)
100 #define MAX14916_REG_WRITE(dev, addr, val) \
101 max14916_reg_trans_spi_diag(dev, addr, val, MAX149x6_WRITE)
102
gpio_max14916_diag_chan_get(const struct device * dev)103 static int gpio_max14916_diag_chan_get(const struct device *dev)
104 {
105 const struct max14916_config *config = dev->config;
106 struct max14916_data *data = dev->data;
107 int ret = 0;
108
109 if (!gpio_pin_get_dt(&config->fault_gpio)) {
110 LOG_ERR("FLT flag is rised");
111 ret = -EIO;
112 }
113
114 data->glob.interrupt.reg_raw =
115 max149x6_reg_transceive(dev, MAX14916_INT_REG, 0, NULL, MAX149x6_READ);
116
117 if (data->glob.interrupt.reg_raw) {
118 if (data->glob.interrupt.reg_bits.OVER_LD_FLT) {
119 data->chan.ovr_ld = max149x6_reg_transceive(dev, MAX14916_OVR_LD_REG, 0,
120 NULL, MAX149x6_READ);
121 }
122 if (data->glob.interrupt.reg_bits.CURR_LIM) {
123 data->chan.curr_lim = max149x6_reg_transceive(dev, MAX14916_CURR_LIM_REG, 0,
124 NULL, MAX149x6_READ);
125 }
126 if (data->glob.interrupt.reg_bits.OW_OFF_FLT) {
127 data->chan.ow_off = max149x6_reg_transceive(dev, MAX14916_OW_OFF_FLT_REG, 0,
128 NULL, MAX149x6_READ);
129 }
130 if (data->glob.interrupt.reg_bits.OW_ON_FLT) {
131 data->chan.ow_on = max149x6_reg_transceive(dev, MAX14916_OW_ON_FLT_REG, 0,
132 NULL, MAX149x6_READ);
133 }
134 if (data->glob.interrupt.reg_bits.SHT_VDD_FLT) {
135 data->chan.sht_vdd = max149x6_reg_transceive(dev, MAX14916_SHT_VDD_FLT_REG,
136 0, NULL, MAX149x6_READ);
137 }
138
139 if (data->glob.interrupt.reg_bits.SUPPLY_ERR) {
140 data->glob.glob_err.reg_raw = max149x6_reg_transceive(
141 dev, MAX14916_GLOB_ERR_REG, 0, NULL, MAX149x6_READ);
142 PRINT_ERR(data->glob.glob_err.reg_bits.VINT_UV);
143 PRINT_ERR(data->glob.glob_err.reg_bits.VA_UVLO);
144 PRINT_ERR(data->glob.glob_err.reg_bits.VDD_BAD);
145 PRINT_ERR(data->glob.glob_err.reg_bits.VDD_WARN);
146 PRINT_ERR(data->glob.glob_err.reg_bits.VDD_UVLO);
147 PRINT_ERR(data->glob.glob_err.reg_bits.THRMSHUTD);
148 PRINT_ERR(data->glob.glob_err.reg_bits.SYNC_ERR);
149 PRINT_ERR(data->glob.glob_err.reg_bits.WDOG_ERR);
150 }
151
152 if (data->glob.interrupt.reg_bits.COM_ERR) {
153 LOG_ERR("MAX14916 Communication Error");
154 }
155 ret = -EIO;
156 }
157
158 return ret;
159 }
160
gpio_max14916_port_set_bits_raw(const struct device * dev,gpio_port_pins_t pins)161 static int gpio_max14916_port_set_bits_raw(const struct device *dev, gpio_port_pins_t pins)
162 {
163 int ret;
164 uint32_t reg_val = 0;
165
166 ret = MAX14916_REG_READ(dev, MAX14916_SETOUT_REG);
167 reg_val = ret | pins;
168
169 return MAX14916_REG_WRITE(dev, MAX14916_SETOUT_REG, reg_val);
170 }
171
gpio_max14916_port_clear_bits_raw(const struct device * dev,gpio_port_pins_t pins)172 static int gpio_max14916_port_clear_bits_raw(const struct device *dev, gpio_port_pins_t pins)
173 {
174 int ret;
175 uint32_t reg_val = 0;
176
177 ret = MAX14916_REG_READ(dev, MAX14916_SETOUT_REG);
178 reg_val = ret & ~pins;
179
180 return MAX14916_REG_WRITE(dev, MAX14916_SETOUT_REG, reg_val);
181 }
182
gpio_max14916_config(const struct device * dev,gpio_pin_t pin,gpio_flags_t flags)183 static int gpio_max14916_config(const struct device *dev, gpio_pin_t pin, gpio_flags_t flags)
184 {
185 int err = 0;
186
187 if ((flags & (GPIO_INPUT | GPIO_OUTPUT)) == GPIO_DISCONNECTED) {
188 return -ENOTSUP;
189 }
190
191 if ((flags & GPIO_SINGLE_ENDED) != 0) {
192 return -ENOTSUP;
193 }
194
195 if ((flags & (GPIO_PULL_UP | GPIO_PULL_DOWN)) != 0) {
196 return -ENOTSUP;
197 }
198
199 if (flags & GPIO_INT_ENABLE) {
200 return -ENOTSUP;
201 }
202
203 switch (flags & GPIO_DIR_MASK) {
204 case GPIO_OUTPUT:
205 break;
206 case GPIO_INPUT:
207 default:
208 LOG_ERR("NOT SUPPORTED OPTION!");
209 return -ENOTSUP;
210 }
211
212 return err;
213 }
214
gpio_max14916_port_get_raw(const struct device * dev,gpio_port_value_t * value)215 static int gpio_max14916_port_get_raw(const struct device *dev, gpio_port_value_t *value)
216 {
217 *value = MAX14916_REG_READ(dev, MAX14916_SETOUT_REG);
218
219 return 0;
220 }
221
gpio_max14916_port_toggle_bits(const struct device * dev,gpio_port_pins_t pins)222 static int gpio_max14916_port_toggle_bits(const struct device *dev, gpio_port_pins_t pins)
223 {
224 int ret;
225 uint32_t reg_val = 0;
226
227 ret = MAX14916_REG_READ(dev, MAX14916_SETOUT_REG);
228
229 reg_val = ret;
230 reg_val ^= pins;
231
232 MAX14916_REG_WRITE(dev, MAX14916_SETOUT_REG, reg_val);
233
234 return 0;
235 }
236
gpio_max14916_clean_on_power(const struct device * dev)237 static int gpio_max14916_clean_on_power(const struct device *dev)
238 {
239 int ret;
240
241 /* Clear the latched faults generated at power up */
242 ret = MAX14916_REG_READ(dev, MAX14916_OW_OFF_FLT_REG);
243 if (ret < 0) {
244 LOG_ERR("Error reading MAX14916_OW_OFF_FLT_REG");
245 goto err_clean_on_power_max14916;
246 }
247
248 ret = MAX14916_REG_READ(dev, MAX14916_OVR_LD_REG);
249 if (ret < 0) {
250 LOG_ERR("Error reading MAX14916_OVR_LD_REG");
251 goto err_clean_on_power_max14916;
252 }
253
254 ret = MAX14916_REG_READ(dev, MAX14916_SHT_VDD_FLT_REG);
255 if (ret < 0) {
256 LOG_ERR("Error reading MAX14916_SHD_VDD_FLT_REG");
257 goto err_clean_on_power_max14916;
258 }
259
260 ret = MAX14916_REG_READ(dev, MAX14916_GLOB_ERR_REG);
261 if (ret < 0) {
262 LOG_ERR("Error reading MAX14916_GLOBAL_FLT_REG");
263 goto err_clean_on_power_max14916;
264 }
265
266 err_clean_on_power_max14916:
267 return ret;
268 }
269
gpio_max14916_config_diag(const struct device * dev)270 static int gpio_max14916_config_diag(const struct device *dev)
271 {
272 const struct max14916_config *config = dev->config;
273 struct max14916_data *data = dev->data;
274
275 MAX14916_REG_WRITE(dev, MAX14916_CONFIG1_REG, config->config1.reg_raw);
276 MAX14916_REG_WRITE(dev, MAX14916_CONFIG2_REG, config->config2.reg_raw);
277 MAX14916_REG_WRITE(dev, MAX14916_OW_OFF_EN_REG, data->chan_en.ow_on_en);
278 MAX14916_REG_WRITE(dev, MAX14916_OW_OFF_EN_REG, data->chan_en.ow_off_en);
279 MAX14916_REG_WRITE(dev, MAX14916_SHT_VDD_EN_REG, data->chan_en.sht_vdd_en);
280 return 0;
281 }
282
gpio_max14916_init(const struct device * dev)283 static int gpio_max14916_init(const struct device *dev)
284 {
285 const struct max14916_config *config = dev->config;
286 int err = 0;
287
288 LOG_DBG(" --- GPIO MAX14916 init IN ---");
289
290 if (!spi_is_ready_dt(&config->spi)) {
291 LOG_ERR("SPI bus is not ready\n");
292 return -ENODEV;
293 }
294
295 /* setup READY gpio - normal low */
296 if (!gpio_is_ready_dt(&config->ready_gpio)) {
297 LOG_ERR("READY GPIO device not ready");
298 return -ENODEV;
299 }
300
301 err = gpio_pin_configure_dt(&config->ready_gpio, GPIO_INPUT);
302 if (err < 0) {
303 LOG_ERR("Failed to configure reset GPIO");
304 return err;
305 }
306
307 /* setup FLT gpio - normal high */
308 if (!gpio_is_ready_dt(&config->fault_gpio)) {
309 LOG_ERR("FLT GPIO device not ready");
310 return -ENODEV;
311 }
312
313 err = gpio_pin_configure_dt(&config->fault_gpio, GPIO_INPUT);
314 if (err < 0) {
315 LOG_ERR("Failed to configure DC GPIO");
316 return err;
317 }
318
319 /* setup LATCH gpio - normal high */
320 if (!gpio_is_ready_dt(&config->sync_gpio)) {
321 LOG_ERR("SYNC GPIO device not ready");
322 return -ENODEV;
323 }
324
325 err = gpio_pin_configure_dt(&config->sync_gpio, GPIO_OUTPUT_INACTIVE);
326 if (err < 0) {
327 LOG_ERR("Failed to configure busy GPIO");
328 return err;
329 }
330
331 /* setup LATCH gpio - normal high */
332 if (!gpio_is_ready_dt(&config->en_gpio)) {
333 LOG_ERR("SYNC GPIO device not ready");
334 return -ENODEV;
335 }
336
337 err = gpio_pin_configure_dt(&config->en_gpio, GPIO_OUTPUT_INACTIVE);
338 if (err < 0) {
339 LOG_ERR("Failed to configure busy GPIO");
340 return err;
341 }
342
343 gpio_pin_set_dt(&config->en_gpio, 1);
344 gpio_pin_set_dt(&config->sync_gpio, 1);
345
346 LOG_ERR("[GPIO] FALUT - %d\n", gpio_pin_get_dt(&config->fault_gpio));
347 LOG_ERR("[GPIO] READY - %d\n", gpio_pin_get_dt(&config->ready_gpio));
348 LOG_ERR("[GPIO] SYNC - %d\n", gpio_pin_get_dt(&config->sync_gpio));
349 LOG_ERR("[GPIO] EN - %d\n", gpio_pin_get_dt(&config->en_gpio));
350
351 int ret = gpio_max14916_clean_on_power(dev);
352
353 MAX14916_REG_WRITE(dev, MAX14916_SETOUT_REG, 0);
354
355 gpio_max14916_config_diag(dev);
356
357 LOG_DBG(" --- GPIO MAX14916 init OUT ---");
358
359 return ret;
360 }
361
362 static DEVICE_API(gpio, gpio_max14916_api) = {
363 .pin_configure = gpio_max14916_config,
364 .port_get_raw = gpio_max14916_port_get_raw,
365 .port_set_bits_raw = gpio_max14916_port_set_bits_raw,
366 .port_clear_bits_raw = gpio_max14916_port_clear_bits_raw,
367 .port_toggle_bits = gpio_max14916_port_toggle_bits,
368 };
369
370 #define GPIO_MAX14906_DEVICE(id) \
371 static const struct max14916_config max14916_##id##_cfg = { \
372 .spi = SPI_DT_SPEC_INST_GET(id, SPI_OP_MODE_MASTER | SPI_WORD_SET(8U), 0U), \
373 .ready_gpio = GPIO_DT_SPEC_INST_GET(id, drdy_gpios), \
374 .fault_gpio = GPIO_DT_SPEC_INST_GET(id, fault_gpios), \
375 .sync_gpio = GPIO_DT_SPEC_INST_GET(id, sync_gpios), \
376 .en_gpio = GPIO_DT_SPEC_INST_GET(id, en_gpios), \
377 .crc_en = DT_INST_PROP(id, crc_en), \
378 .config1.reg_bits.FLED_SET = DT_INST_PROP(id, fled_set), \
379 .config1.reg_bits.SLED_SET = DT_INST_PROP(id, sled_set), \
380 .config1.reg_bits.FLED_STRETCH = DT_INST_PROP(id, fled_stretch), \
381 .config1.reg_bits.FFILTER_EN = DT_INST_PROP(id, ffilter_en), \
382 .config1.reg_bits.FILTER_LONG = DT_INST_PROP(id, filter_long), \
383 .config1.reg_bits.FLATCH_EN = DT_INST_PROP(id, flatch_en), \
384 .config1.reg_bits.LED_CURR_LIM = DT_INST_PROP(id, led_cur_lim), \
385 .config2.reg_bits.VDD_ON_THR = DT_INST_PROP(id, vdd_on_thr), \
386 .config2.reg_bits.SYNCH_WD_EN = DT_INST_PROP(id, synch_wd_en), \
387 .config2.reg_bits.SHT_VDD_THR = DT_INST_PROP(id, sht_vdd_thr), \
388 .config2.reg_bits.OW_OFF_CS = DT_INST_PROP(id, ow_off_cs), \
389 .config2.reg_bits.WD_TO = DT_INST_PROP(id, wd_to), \
390 .pkt_size = (DT_INST_PROP(id, crc_en) & 0x1) ? 3 : 2, \
391 .spi_addr = DT_INST_PROP(id, spi_addr), \
392 }; \
393 \
394 static struct max14916_data max14916_##id##_data; \
395 \
396 DEVICE_DT_INST_DEFINE(id, &gpio_max14916_init, NULL, &max14916_##id##_data, \
397 &max14916_##id##_cfg, POST_KERNEL, \
398 CONFIG_GPIO_MAX14916_INIT_PRIORITY, &gpio_max14916_api);
399
400 DT_INST_FOREACH_STATUS_OKAY(GPIO_MAX14906_DEVICE)
401
