1# NPCX eSPI driver configuration options 2 3# Copyright (c) 2020 Nuvoton Technology Corporation. 4# SPDX-License-Identifier: Apache-2.0 5 6config ESPI_NPCX 7 bool "Nuvoton NPCX embedded controller (EC) ESPI driver" 8 default y 9 depends on SOC_FAMILY_NPCX 10 depends on DT_HAS_NUVOTON_NPCX_ESPI_ENABLED 11 select PINCTRL 12 help 13 This option enables the Intel Enhanced Serial Peripheral Interface 14 (eSPI) for NPCX family of processors. 15 16config ESPI_NPCX_PERIPHERAL_ACPI_SHD_MEM_SIZE 17 int "Host I/O peripheral port size for shared memory in npcx series" 18 depends on ESPI_NPCX || ESPI_PERIPHERAL_ACPI_SHM_REGION 19 default 256 20 help 21 This is the port size used by the Host and EC to communicate over 22 the shared memory region to return the ACPI response data. Please 23 notice the valid value in npcx ec series for this option is 8/16/32/ 24 64/128/256/512/1024/2048/4096 bytes. 25 26config ESPI_NPCX_PERIPHERAL_HOST_CMD_PARAM_SIZE 27 int "Host I/O peripheral port size for ec host command in npcx series" 28 depends on ESPI_NPCX || ESPI_PERIPHERAL_EC_HOST_CMD 29 default 256 30 help 31 This is the port size used by the Host and EC to communicate over 32 the shared memory region to return the host command parameter data. 33 Please notice the valid value in npcx ec series for this option is 34 8/16/32/64/128/256/512/1024/2048/4096 bytes. 35 36config ESPI_NPCX_BYPASS_CH_ENABLE_FATAL_ERROR 37 bool 38 depends on SOC_SERIES_NPCX7 || SOC_SERIES_NPCX9 39 default y 40 help 41 Workaround the issue documented in NPCX99nF errata rev1_2, No.3.10. 42 Enabling an eSPI channel during an eSPI transaction might 43 (with low probability) cause the eSPI_SIF module to transition to 44 a wrong state and therefore response with FATAL_ERROR on an incoming 45 transaction. 46 47config ESPI_NPCX_PERIPHERAL_DEBUG_PORT_80_MULTI_BYTE 48 bool "Host can write 1/2/4 bytes of Port80 data in a eSPI transaction" 49 depends on (SOC_SERIES_NPCX9 || SOC_SERIES_NPCX4) && ESPI_PERIPHERAL_DEBUG_PORT_80 50 select RING_BUFFER 51 help 52 EC can accept 1/2/4 bytes of Port 80 data written from the Host in an 53 eSPI transaction. 54 55config ESPI_NPCX_PERIPHERAL_DEBUG_PORT_80_RING_BUF_SIZE 56 int "Debug Port80 ring buffer size" 57 depends on ESPI_NPCX_PERIPHERAL_DEBUG_PORT_80_MULTI_BYTE 58 default 256 59 help 60 The size of the ring buffer in byte used by the Port80 ISR to store 61 Postcodes from Host. 62 63config ESPI_TAF_NPCX 64 bool "Nuvoton NPCX embedded controller (EC) ESPI TAF driver" 65 depends on SOC_SERIES_NPCX4 66 depends on FLASH 67 help 68 This option enables the Intel Enhanced Serial Peripheral Interface 69 Target Attached Flash (eSPI TAF) for NPCX4 family of processors. 70 71choice ESPI_TAF_ACCESS_MODE_CHOICE 72 prompt "eSPI TAF Read Access Mode" 73 default ESPI_TAF_AUTO_MODE 74 75config ESPI_TAF_AUTO_MODE 76 bool "eSPI TAF Automatic Mode" 77 help 78 This is the setting to use auto mode for eSPI TAF read. 79 80config ESPI_TAF_MANUAL_MODE 81 bool "eSPI TAF Manual Mode" 82 help 83 This is the setting to use manual mode for eSPI TAF read. 84 85endchoice 86 87config ESPI_TAF_PR_NUM 88 int "Sets of protection region settings" 89 default 16 90 help 91 This size is display how many group of slave attached flash protection 92 region. 93 94config ESPI_TAF_NPCX_RPMC_SUPPORT 95 bool "eSPI TAF RPMC support" 96 depends on ESPI_TAF_NPCX 97 select FLASH_EX_OP_ENABLED 98 help 99 This option enable the handler for eSPI TAF RPMC request. 100 101# The default value 'y' for the existing options if ESPI_NPCX is selected. 102if ESPI_NPCX 103 104config ESPI_OOB_CHANNEL 105 default y 106 107config ESPI_PERIPHERAL_8042_KBC 108 default y 109 110config ESPI_PERIPHERAL_HOST_IO 111 default y 112 113config ESPI_PERIPHERAL_DEBUG_PORT_80 114 default y 115 116config ESPI_PERIPHERAL_EC_HOST_CMD 117 default y 118 119config ESPI_PERIPHERAL_ACPI_SHM_REGION 120 default y 121 122config ESPI_PERIPHERAL_CUSTOM_OPCODE 123 default y 124 125config ESPI_NPCX_SUPP_VW_GPIO 126 bool "Indicates that the eSPI hardware supports virtual wire GPIOs" 127 default y if SOC_SERIES_NPCX9 || SOC_SERIES_NPCX4 128 help 129 Selected if NPCX series supports virtual wire GPIOs in eSPI module. 130 131config ESPI_NPCX_CAF_GLOBAL_RESET_WORKAROUND 132 bool 133 default y if SOC_SERIES_NPCX4 && ESPI_FLASH_CHANNEL 134 help 135 Workaround the issue "Global Reset" in the npcx4 SoC errata. 136 137endif #ESPI_NPCX 138