1 /*
2  * Copyright (c) 2023 Nordic Semiconductor ASA
3  *
4  * SPDX-License-Identifier: Apache-2.0
5  */
6 
7 #include <zephyr/kernel.h>
8 #include <zephyr/drivers/gpio.h>
9 #include <soc.h>
10 
11 #if defined(CONFIG_SOC_SERIES_NRF52X) || defined(CONFIG_SOC_SERIES_NRF53X)
12 #define CPU_CLOCK		64000000U
13 #else
14 #define CPU_CLOCK		CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC
15 #endif
16 
17 #if defined(CONFIG_SOC_SERIES_NRF52X) || defined(CONFIG_SOC_SERIES_NRF53X)
18 #define FAST_BITBANG_HW_SUPPORT 1
19 #else
20 #define FAST_BITBANG_HW_SUPPORT 0
21 #endif
22 
pin_delay_asm(uint32_t delay)23 static ALWAYS_INLINE void pin_delay_asm(uint32_t delay)
24 {
25 #if defined(CONFIG_CPU_CORTEX_M)
26 	__asm volatile ("movs r3, %[p]\n"
27 			".start_%=:\n"
28 			"subs r3, #1\n"
29 			"bne .start_%=\n"
30 			:
31 			: [p] "r" (delay)
32 			: "r3", "cc"
33 			);
34 #else
35 #warning "Pin delay is not defined"
36 #endif
37 }
38 
swdp_ll_pin_input(void * const base,uint8_t pin)39 static ALWAYS_INLINE void swdp_ll_pin_input(void *const base, uint8_t pin)
40 {
41 #if defined(CONFIG_SOC_SERIES_NRF52X) || defined(CONFIG_SOC_SERIES_NRF53X)
42 	NRF_GPIO_Type * reg = base;
43 
44 	reg->PIN_CNF[pin] = 0b0000;
45 #endif
46 }
47 
swdp_ll_pin_output(void * const base,uint8_t pin)48 static ALWAYS_INLINE void swdp_ll_pin_output(void *const base, uint8_t pin)
49 {
50 #if defined(CONFIG_SOC_SERIES_NRF52X) || defined(CONFIG_SOC_SERIES_NRF53X)
51 	NRF_GPIO_Type * reg = base;
52 
53 	reg->PIN_CNF[pin] = 0b0001;
54 #endif
55 }
56 
57 
swdp_ll_pin_set(void * const base,uint8_t pin)58 static ALWAYS_INLINE void swdp_ll_pin_set(void *const base, uint8_t pin)
59 {
60 #if defined(CONFIG_SOC_SERIES_NRF52X) || defined(CONFIG_SOC_SERIES_NRF53X)
61 	NRF_GPIO_Type * reg = base;
62 
63 	reg->OUTSET = BIT(pin);
64 #endif
65 }
66 
swdp_ll_pin_clr(void * const base,uint8_t pin)67 static ALWAYS_INLINE void swdp_ll_pin_clr(void *const base, uint8_t pin)
68 {
69 #if defined(CONFIG_SOC_SERIES_NRF52X) || defined(CONFIG_SOC_SERIES_NRF53X)
70 	NRF_GPIO_Type * reg = base;
71 
72 	reg->OUTCLR = BIT(pin);
73 #endif
74 }
75 
swdp_ll_pin_get(void * const base,uint8_t pin)76 static ALWAYS_INLINE uint32_t swdp_ll_pin_get(void *const base, uint8_t pin)
77 {
78 #if defined(CONFIG_SOC_SERIES_NRF52X) || defined(CONFIG_SOC_SERIES_NRF53X)
79 	NRF_GPIO_Type * reg = base;
80 
81 	return ((reg->IN >> pin) & 1);
82 #else
83 	return 0UL;
84 #endif
85 }
86