1 /*
2 * Copyright (c) 2023 Renesas Electronics Corporation
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7 #define DT_DRV_COMPAT renesas_smartbond_sdadc
8
9 #define ADC_CONTEXT_USES_KERNEL_TIMER
10 #include <DA1469xAB.h>
11 #include <da1469x_pd.h>
12 #include "adc_context.h"
13 #include <zephyr/dt-bindings/adc/smartbond-adc.h>
14
15 #define LOG_LEVEL CONFIG_ADC_LOG_LEVEL
16 #include <zephyr/logging/log.h>
17 #include <zephyr/irq.h>
18 #include <zephyr/sys/math_extras.h>
19 #include <zephyr/drivers/pinctrl.h>
20 #include <zephyr/pm/device.h>
21 #include <zephyr/pm/policy.h>
22 #include <zephyr/pm/device_runtime.h>
23
24 LOG_MODULE_REGISTER(adc_smartbond_sdadc);
25
26 struct sdadc_smartbond_cfg {
27 const struct pinctrl_dev_config *pcfg;
28 /** Value for SDADC_CLK_FREQ */
29 uint8_t sdadc_clk_freq;
30 };
31
32 struct sdadc_smartbond_data {
33 struct adc_context ctx;
34
35 /* Buffer to store channel data */
36 uint16_t *buffer;
37 /* Copy of channel mask from sequence */
38 uint32_t channel_read_mask;
39 /* Number of bits in sequence channels */
40 uint8_t sequence_channel_count;
41 /* Index in buffer to store current value to */
42 uint8_t result_index;
43 };
44
45 #define SMARTBOND_SDADC_CHANNEL_COUNT 8
46
47 struct sdadc_smartbond_channel_cfg {
48 uint32_t sd_adc_ctrl_reg;
49 };
50
51 static struct sdadc_smartbond_channel_cfg m_sdchannels[SMARTBOND_SDADC_CHANNEL_COUNT];
52
53 /* Implementation of the ADC driver API function: adc_channel_setup. */
sdadc_smartbond_channel_setup(const struct device * dev,const struct adc_channel_cfg * channel_cfg)54 static int sdadc_smartbond_channel_setup(const struct device *dev,
55 const struct adc_channel_cfg *channel_cfg)
56 {
57 uint8_t channel_id = channel_cfg->channel_id;
58 struct sdadc_smartbond_channel_cfg *config = &m_sdchannels[channel_id];
59
60 if (channel_id >= SMARTBOND_SDADC_CHANNEL_COUNT) {
61 return -EINVAL;
62 }
63
64 if (channel_cfg->acquisition_time != ADC_ACQ_TIME_DEFAULT) {
65 LOG_ERR("Selected ADC acquisition time is not valid");
66 return -EINVAL;
67 }
68
69 if (channel_cfg->input_positive > SMARTBOND_SDADC_VBAT) {
70 LOG_ERR("Channels out of range");
71 return -EINVAL;
72 }
73 if (channel_cfg->differential) {
74 if (channel_cfg->input_negative >= SMARTBOND_SDADC_VBAT) {
75 LOG_ERR("Differential negative channels out of range");
76 return -EINVAL;
77 }
78 }
79
80 config->sd_adc_ctrl_reg = 0;
81 if ((channel_cfg->input_positive == SMARTBOND_SDADC_VBAT &&
82 channel_cfg->gain != ADC_GAIN_1_4) ||
83 (channel_cfg->input_positive != SMARTBOND_SDADC_VBAT &&
84 channel_cfg->gain != ADC_GAIN_1)) {
85 LOG_ERR("ADC gain should be 1/4 for VBAT and 1 for all other channels");
86 return -EINVAL;
87 }
88
89 switch (channel_cfg->reference) {
90 case ADC_REF_INTERNAL:
91 break;
92 default:
93 LOG_ERR("Selected ADC reference is not valid");
94 return -EINVAL;
95 }
96
97 config->sd_adc_ctrl_reg =
98 channel_cfg->input_positive << SDADC_SDADC_CTRL_REG_SDADC_INP_SEL_Pos;
99 if (channel_cfg->differential) {
100 config->sd_adc_ctrl_reg |=
101 channel_cfg->input_negative << SDADC_SDADC_CTRL_REG_SDADC_INN_SEL_Pos;
102 } else {
103 config->sd_adc_ctrl_reg |= SDADC_SDADC_CTRL_REG_SDADC_SE_Msk;
104 }
105
106 return 0;
107 }
108
109 #define PER_CHANNEL_ADC_CONFIG_MASK (SDADC_SDADC_CTRL_REG_SDADC_INP_SEL_Msk | \
110 SDADC_SDADC_CTRL_REG_SDADC_INN_SEL_Msk | \
111 SDADC_SDADC_CTRL_REG_SDADC_SE_Msk \
112 )
113
sdadc_smartbond_pm_policy_state_lock_get(const struct device * dev,struct sdadc_smartbond_data * data)114 static inline void sdadc_smartbond_pm_policy_state_lock_get(const struct device *dev,
115 struct sdadc_smartbond_data *data)
116 {
117 #if defined(CONFIG_PM_DEVICE)
118 pm_device_runtime_get(dev);
119 /*
120 * Prevent the SoC from entering the normal sleep state.
121 */
122 pm_policy_state_lock_get(PM_STATE_STANDBY, PM_ALL_SUBSTATES);
123 #endif
124 }
125
sdadc_smartbond_pm_policy_state_lock_put(const struct device * dev,struct sdadc_smartbond_data * data)126 static inline void sdadc_smartbond_pm_policy_state_lock_put(const struct device *dev,
127 struct sdadc_smartbond_data *data)
128 {
129 #if defined(CONFIG_PM_DEVICE)
130 /*
131 * Allow the SoC to enter the normal sleep state once sdadc is done.
132 */
133 pm_policy_state_lock_put(PM_STATE_STANDBY, PM_ALL_SUBSTATES);
134 pm_device_runtime_put(dev);
135 #endif
136 }
137
138
pop_count(uint32_t n)139 static int pop_count(uint32_t n)
140 {
141 return __builtin_popcount(n);
142 }
143
adc_context_start_sampling(struct adc_context * ctx)144 static void adc_context_start_sampling(struct adc_context *ctx)
145 {
146 uint32_t val;
147 struct sdadc_smartbond_data *data =
148 CONTAINER_OF(ctx, struct sdadc_smartbond_data, ctx);
149 /* Extract lower channel from sequence mask */
150 int current_channel = u32_count_trailing_zeros(data->channel_read_mask);
151
152 /* Wait until the SDADC LDO stabilizes */
153 while (!(SDADC->SDADC_CTRL_REG & SDADC_SDADC_CTRL_REG_SDADC_LDO_OK_Msk)) {
154 __NOP();
155 }
156
157 if (ctx->sequence.calibrate) {
158 /* TODO: Add calibration code */
159 } else {
160 val = SDADC->SDADC_CTRL_REG & ~PER_CHANNEL_ADC_CONFIG_MASK;
161 val |= m_sdchannels[current_channel].sd_adc_ctrl_reg;
162 val |= SDADC_SDADC_CTRL_REG_SDADC_START_Msk |
163 SDADC_SDADC_CTRL_REG_SDADC_MINT_Msk;
164 val |= (ctx->sequence.oversampling - 7) << SDADC_SDADC_CTRL_REG_SDADC_OSR_Pos;
165
166 SDADC->SDADC_CTRL_REG = val;
167 }
168 }
169
adc_context_update_buffer_pointer(struct adc_context * ctx,bool repeat)170 static void adc_context_update_buffer_pointer(struct adc_context *ctx,
171 bool repeat)
172 {
173 struct sdadc_smartbond_data *data =
174 CONTAINER_OF(ctx, struct sdadc_smartbond_data, ctx);
175
176 if (!repeat) {
177 data->buffer += data->sequence_channel_count;
178 }
179 }
180
check_buffer_size(const struct adc_sequence * sequence,uint8_t active_channels)181 static int check_buffer_size(const struct adc_sequence *sequence,
182 uint8_t active_channels)
183 {
184 size_t needed_buffer_size;
185
186 needed_buffer_size = active_channels * sizeof(uint16_t);
187 if (sequence->options) {
188 needed_buffer_size *= (1 + sequence->options->extra_samplings);
189 }
190
191 if (sequence->buffer_size < needed_buffer_size) {
192 LOG_ERR("Provided buffer is too small (%u/%u)",
193 sequence->buffer_size, needed_buffer_size);
194 return -ENOMEM;
195 }
196
197 return 0;
198 }
199
start_read(const struct device * dev,const struct adc_sequence * sequence)200 static int start_read(const struct device *dev,
201 const struct adc_sequence *sequence)
202 {
203 int error;
204 struct sdadc_smartbond_data *data = dev->data;
205
206 if (sequence->oversampling < 7U || sequence->oversampling > 10) {
207 LOG_ERR("Invalid oversampling");
208 return -EINVAL;
209 }
210
211 if ((sequence->channels == 0) ||
212 ((sequence->channels & ~BIT_MASK(SMARTBOND_SDADC_CHANNEL_COUNT)) != 0)) {
213 LOG_ERR("Channel scanning is not supported");
214 return -EINVAL;
215 }
216
217 if (sequence->resolution < 8 || sequence->resolution > 15) {
218 LOG_ERR("ADC resolution value %d is not valid",
219 sequence->resolution);
220 return -EINVAL;
221 }
222
223 error = check_buffer_size(sequence, 1);
224 if (error) {
225 return error;
226 }
227
228 data->buffer = sequence->buffer;
229 data->channel_read_mask = sequence->channels;
230 data->sequence_channel_count = pop_count(sequence->channels);
231 data->result_index = 0;
232
233 adc_context_start_read(&data->ctx, sequence);
234
235 error = adc_context_wait_for_completion(&data->ctx);
236 return error;
237 }
238
sdadc_smartbond_isr(const struct device * dev)239 static void sdadc_smartbond_isr(const struct device *dev)
240 {
241 struct sdadc_smartbond_data *data = dev->data;
242 int current_channel = u32_count_trailing_zeros(data->channel_read_mask);
243
244 SDADC->SDADC_CLEAR_INT_REG = 0;
245 /* Store current channel value, result is left justified, move bits right */
246 data->buffer[data->result_index++] = ((uint16_t)SDADC->SDADC_RESULT_REG) >>
247 (16 - data->ctx.sequence.resolution);
248 /* Exclude channel from mask for further reading */
249 data->channel_read_mask ^= 1 << current_channel;
250
251 if (data->channel_read_mask == 0) {
252 sdadc_smartbond_pm_policy_state_lock_put(dev, data);
253 adc_context_on_sampling_done(&data->ctx, dev);
254 } else {
255 adc_context_start_sampling(&data->ctx);
256 }
257
258 LOG_DBG("%s ISR triggered.", dev->name);
259 }
260
261 /* Implementation of the ADC driver API function: adc_read. */
sdadc_smartbond_read(const struct device * dev,const struct adc_sequence * sequence)262 static int sdadc_smartbond_read(const struct device *dev,
263 const struct adc_sequence *sequence)
264 {
265 int error;
266 struct sdadc_smartbond_data *data = dev->data;
267
268 adc_context_lock(&data->ctx, false, NULL);
269 sdadc_smartbond_pm_policy_state_lock_get(dev, data);
270 error = start_read(dev, sequence);
271 adc_context_release(&data->ctx, error);
272
273 return error;
274 }
275
276 #if defined(CONFIG_ADC_ASYNC)
277 /* Implementation of the ADC driver API function: adc_read_sync. */
sdadc_smartbond_read_async(const struct device * dev,const struct adc_sequence * sequence,struct k_poll_signal * async)278 static int sdadc_smartbond_read_async(const struct device *dev,
279 const struct adc_sequence *sequence,
280 struct k_poll_signal *async)
281 {
282 struct sdadc_smartbond_data *data = dev->data;
283 int error;
284
285 adc_context_lock(&data->ctx, true, async);
286 sdadc_smartbond_pm_policy_state_lock_get(dev, data);
287 error = start_read(dev, sequence);
288 adc_context_release(&data->ctx, error);
289
290 return error;
291 }
292 #endif /* CONFIG_ADC_ASYNC */
293
sdadc_smartbond_resume(const struct device * dev)294 static int sdadc_smartbond_resume(const struct device *dev)
295 {
296 int ret;
297 const struct sdadc_smartbond_cfg *config = dev->config;
298
299 da1469x_pd_acquire(MCU_PD_DOMAIN_COM);
300
301 SDADC->SDADC_TEST_REG =
302 (SDADC->SDADC_TEST_REG & ~SDADC_SDADC_TEST_REG_SDADC_CLK_FREQ_Msk) |
303 (config->sdadc_clk_freq) << SDADC_SDADC_TEST_REG_SDADC_CLK_FREQ_Pos;
304
305 SDADC->SDADC_CTRL_REG = SDADC_SDADC_CTRL_REG_SDADC_EN_Msk;
306
307 /*
308 * Configure dt provided device signals when available.
309 * pinctrl is optional so ENOENT is not setup failure.
310 */
311 ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_DEFAULT);
312 if (ret < 0 && ret != -ENOENT) {
313 SDADC->SDADC_CTRL_REG = 0;
314
315 /* Release the comms domain */
316 da1469x_pd_release(MCU_PD_DOMAIN_COM);
317
318 LOG_ERR("ADC pinctrl setup failed (%d)", ret);
319 return ret;
320 }
321
322 return 0;
323 }
324
325 #ifdef CONFIG_PM_DEVICE
sdadc_smartbond_suspend(const struct device * dev)326 static int sdadc_smartbond_suspend(const struct device *dev)
327 {
328 int ret;
329 const struct sdadc_smartbond_cfg *config = dev->config;
330
331 /* Disable the sdadc LDO */
332 SDADC->SDADC_CTRL_REG = 0;
333
334 /* Release the comms domain */
335 da1469x_pd_release(MCU_PD_DOMAIN_COM);
336
337 /*
338 * Configure dt provided device signals for sleep.
339 * pinctrl is optional so ENOENT is not setup failure.
340 */
341 ret = pinctrl_apply_state(config->pcfg, PINCTRL_STATE_SLEEP);
342 if (ret < 0 && ret != -ENOENT) {
343 LOG_WRN("Failed to configure the sdadc pins to inactive state");
344 return ret;
345 }
346
347 return 0;
348 }
349
sdadc_smartbond_pm_action(const struct device * dev,enum pm_device_action action)350 static int sdadc_smartbond_pm_action(const struct device *dev,
351 enum pm_device_action action)
352 {
353 int ret;
354
355 switch (action) {
356 case PM_DEVICE_ACTION_RESUME:
357 ret = sdadc_smartbond_resume(dev);
358 break;
359 case PM_DEVICE_ACTION_SUSPEND:
360 ret = sdadc_smartbond_suspend(dev);
361 break;
362 default:
363 return -ENOTSUP;
364 }
365 return ret;
366 }
367 #endif /* CONFIG_PM_DEVICE */
368
sdadc_smartbond_init(const struct device * dev)369 static int sdadc_smartbond_init(const struct device *dev)
370 {
371 int ret;
372 struct sdadc_smartbond_data *data = dev->data;
373
374 #ifdef CONFIG_PM_DEVICE_RUNTIME
375 /* Make sure device state is marked as suspended */
376 pm_device_init_suspended(dev);
377
378 ret = pm_device_runtime_enable(dev);
379
380 #else
381 ret = sdadc_smartbond_resume(dev);
382
383 #endif
384
385 IRQ_CONNECT(DT_INST_IRQN(0), DT_INST_IRQ(0, priority),
386 sdadc_smartbond_isr, DEVICE_DT_INST_GET(0), 0);
387
388 NVIC_ClearPendingIRQ(DT_INST_IRQN(0));
389 NVIC_EnableIRQ(DT_INST_IRQN(0));
390
391 adc_context_unlock_unconditionally(&data->ctx);
392
393 return ret;
394 }
395
396 static DEVICE_API(adc, sdadc_smartbond_driver_api) = {
397 .channel_setup = sdadc_smartbond_channel_setup,
398 .read = sdadc_smartbond_read,
399 #ifdef CONFIG_ADC_ASYNC
400 .read_async = sdadc_smartbond_read_async,
401 #endif
402 .ref_internal = 1200,
403 };
404
405 /*
406 * There is only one instance on supported SoCs, so inst is guaranteed
407 * to be 0 if any instance is okay. (We use adc_0 above, so the driver
408 * is relying on the numeric instance value in a way that happens to
409 * be safe.)
410 *
411 * Just in case that assumption becomes invalid in the future, we use
412 * a BUILD_ASSERT().
413 */
414 #define SDADC_INIT(inst) \
415 BUILD_ASSERT((inst) == 0, \
416 "multiple instances not supported"); \
417 PINCTRL_DT_INST_DEFINE(inst); \
418 static const struct sdadc_smartbond_cfg sdadc_smartbond_cfg_##inst = { \
419 .pcfg = PINCTRL_DT_INST_DEV_CONFIG_GET(inst), \
420 .sdadc_clk_freq = DT_INST_PROP(inst, clock_freq), \
421 }; \
422 static struct sdadc_smartbond_data sdadc_smartbond_data_##inst = { \
423 ADC_CONTEXT_INIT_TIMER(sdadc_smartbond_data_##inst, ctx), \
424 ADC_CONTEXT_INIT_LOCK(sdadc_smartbond_data_##inst, ctx), \
425 ADC_CONTEXT_INIT_SYNC(sdadc_smartbond_data_##inst, ctx), \
426 }; \
427 PM_DEVICE_DT_INST_DEFINE(inst, sdadc_smartbond_pm_action); \
428 DEVICE_DT_INST_DEFINE(inst, \
429 sdadc_smartbond_init, \
430 PM_DEVICE_DT_INST_GET(inst), \
431 &sdadc_smartbond_data_##inst, \
432 &sdadc_smartbond_cfg_##inst, \
433 POST_KERNEL, \
434 CONFIG_ADC_INIT_PRIORITY, \
435 &sdadc_smartbond_driver_api);
436
437 DT_INST_FOREACH_STATUS_OKAY(SDADC_INIT)
438