1/*
2 * Copyright (c) 2023 STMicroelectronics
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6/dts-v1/;
7#include <st/l4/stm32l4r9Xi.dtsi>
8#include <st/l4/stm32l4r9a(g-i)ix-pinctrl.dtsi>
9#include <zephyr/dt-bindings/input/input-event-codes.h>
10#include "arduino_r3_connector.dtsi"
11
12/ {
13	model = "STMicroelectronics STM32L4R9I-DISCO board";
14	compatible = "st,stm32l4r9i-disco";
15
16	chosen {
17		zephyr,console = &usart2;
18		zephyr,shell-uart = &usart2;
19		zephyr,sram = &sram0;
20		zephyr,flash = &flash0;
21	};
22
23	leds {
24		compatible = "gpio-leds";
25		/* N.B. LD1 (orange) is not wired to MCU */
26		green_led: led_2 {
27			gpios = <&gpioh 4 GPIO_ACTIVE_LOW>;
28			label = "User LD2";
29		};
30	};
31
32	gpio_keys {
33		compatible = "gpio-keys";
34		joy_sel: joystick_selection {
35			label = "joystick selection";
36			gpios = <&gpioc 13 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>;
37			zephyr,code = <INPUT_KEY_ENTER>;
38		};
39	};
40
41	aliases {
42		led0 = &green_led;
43		sw0 = &joy_sel;
44		die-temp0 = &die_temp;
45		volt-sensor0 = &vref;
46		volt-sensor1 = &vbat;
47	};
48};
49
50&clk_lse {
51	status = "okay";
52};
53
54&clk_lsi {
55	status = "okay";
56};
57
58&clk_hsi48 {
59	status = "okay";
60};
61
62&clk_hsi {
63	status = "okay";
64};
65
66&clk_msi {
67	status = "okay";
68	msi-range = <6>;
69	msi-pll-mode;
70};
71
72&pll {
73	status = "okay";
74	div-m = <1>;
75	mul-n = <60>;
76	/*
77	 * WORKAROUND: stm32l4-pll-clock does not allow arbitrary PLLP dividers.
78	 * Disable PLLP completely since it only feeds SAI, which is not active either.
79	 */
80	/* div-p = <5>; */
81	div-q = <2>;
82	div-r = <2>;
83	clocks = <&clk_msi>;
84};
85
86&rcc {
87	clocks = <&pll>;
88	ahb-prescaler = <1>;
89	clock-frequency = <DT_FREQ_M(120)>;
90	apb1-prescaler = <1>;
91	apb2-prescaler = <1>;
92};
93
94&usart2 {
95	status = "okay";
96	pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>;
97	pinctrl-names = "default";
98	current-speed = <115200>;
99};
100
101&lpuart1 {
102	status = "okay";
103	pinctrl-0 = <&lpuart1_tx_pc1 &lpuart1_rx_pc0>;
104	pinctrl-names = "default";
105	current-speed = <115200>;
106};
107
108&timers3 {
109	status = "okay";
110
111	pwm3: pwm {
112		status = "okay";
113		/*
114		 * N.B.: Datasheet indicates that ARD_D11 (wired to PB15) is connected to TIM3_CH2.
115		 * However, this is incorrect as PB15 cannot be muxed to TIM3 (see DS12023).
116		 * Moved ARD_D11 to TIM15_CH2 instead.
117		 */
118		pinctrl-0 = <&tim3_ch1_pb4>;
119		pinctrl-names = "default";
120	};
121};
122
123&timers5 {
124	status = "okay";
125
126	pwm5: pwm {
127		status = "okay";
128		pinctrl-0 = <&tim5_ch2_pa1 &tim5_ch4_pi0>;
129		pinctrl-names = "default";
130	};
131};
132
133&timers8 {
134	status = "okay";
135
136	pwm8: pwm {
137		status = "okay";
138		pinctrl-0 = <&tim8_ch1n_ph13>;
139		pinctrl-names = "default";
140	};
141};
142
143&timers15 {
144	status = "okay";
145
146	pwm15: pwm {
147		status = "okay";
148		pinctrl-0 = <&tim15_ch2_pf10 &tim15_ch2_pb15>;
149		pinctrl-names = "default";
150	};
151};
152
153&i2c1 {
154	status = "okay";
155	pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pg13>;
156	pinctrl-names = "default";
157	clock-frequency = <I2C_BITRATE_STANDARD>;
158};
159
160&i2c3 {
161	status = "okay";
162	pinctrl-0 = <&i2c3_scl_pg7 &i2c3_sda_pg8>;
163	pinctrl-names = "default";
164	clock-frequency = <I2C_BITRATE_STANDARD>;
165};
166
167&spi2 {
168	status = "okay";
169	pinctrl-0 = <&spi2_sck_pb13 &spi2_miso_pb14 &spi2_mosi_pb15>;
170	pinctrl-names = "default";
171	cs-gpios = <&gpioi 0 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
172};
173
174&rtc {
175	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>,
176				<&rcc STM32_SRC_LSE RTC_SEL(1)>;
177	status = "okay";
178};
179
180&sdmmc1 {
181	status = "okay";
182	pinctrl-0 = <&sdmmc1_d0_pc8 &sdmmc1_d1_pc9
183		&sdmmc1_d2_pc10 &sdmmc1_d3_pc11
184		&sdmmc1_ck_pc12 &sdmmc1_cmd_pd2>;
185	pinctrl-names = "default";
186};
187
188&adc1 {
189	status = "okay";
190	pinctrl-0 = <&adc1_in5_pa0 &adc1_in12_pa7 &adc1_in15_pb0
191			&adc1_in4_pc3 &adc1_in13_pc4>;
192	pinctrl-names = "default";
193	st,adc-clock-source = "SYNC";
194	st,adc-prescaler = <1>;
195};
196
197zephyr_udc0: &usbotg_fs {
198	status = "okay";
199	pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12
200			&usb_otg_fs_id_pa10>;
201	pinctrl-names = "default";
202};
203
204&die_temp {
205	status = "okay";
206};
207
208&vref {
209	status = "okay";
210};
211
212&vbat {
213	status = "okay";
214};
215
216&octospi2 {
217	status = "okay";
218	pinctrl-0 = <&octospim_p2_clk_pi6 &octospim_p2_ncs_pg12
219			&octospim_p2_io0_pi11 &octospim_p2_io1_pi10
220			&octospim_p2_io2_pi9 &octospim_p2_io3_ph8
221			&octospim_p2_io4_ph9 &octospim_p2_io5_ph10
222			&octospim_p2_io6_pg9 &octospim_p2_io7_pg10
223			&octospim_p2_dqs_pg15>;
224	pinctrl-names = "default";
225
226	mx25lm51245: ospi-nor-flash@90000000 {
227		status = "okay";
228		compatible = "st,stm32-ospi-nor";
229		reg = <0x90000000 DT_SIZE_M(64)>; /* 512 Mbits */
230		ospi-max-frequency = <DT_FREQ_M(25)>;
231		spi-bus-width = <OSPI_OPI_MODE>;
232		data-rate = <OSPI_STR_TRANSFER>;
233		four-byte-opcodes;
234		sfdp-bfp = [
235			53 46 44 50 06 01 02 ff
236			00 06 01 10 30 00 00 ff
237			c2 00 01 04 10 01 00 ff
238			84 00 01 02 c0 00 00 ff
239			00 00 00 00 00 00 00 00
240			00 00 00 00 00 00 00 00
241			e5 20 fb ff ff ff ff 1f
242			44 eb 08 6b 08 3b 04 bb
243			fe ff ff ff ff ff 00 ff
244			ff ff 44 eb 0c 20 0f 52
245			10 d8 00 ff d6 49 c5 00
246			81 df 04 e3 44 03 67 38
247			30 b0 30 b0 f7 bd d5 5c
248			4a 9e 29 ff f0 50 f9 85
249			00 00 00 00 00 00 00 00
250			00 00 00 00 00 00 00 00
251			00 00 00 00 00 00 00 00
252			00 00 00 00 00 00 00 00
253			00 00 00 00 00 00 00 00
254			00 00 00 00 00 00 00 00
255			00 00 00 00 00 00 00 00
256			00 00 00 00 00 00 00 00
257			00 00 00 00 00 00 00 00
258			00 00 00 00 00 00 00 00
259			7f ef ff ff 21 5c dc ff
260		];
261
262		partitions {
263			compatible = "fixed-partitions";
264			#address-cells = <1>;
265			#size-cells = <1>;
266
267			partition@0 {
268				reg = <0x00000000 DT_SIZE_M(64)>;
269			};
270		};
271	};
272};
273