1/* 2 * Copyright (c) 2019 STMicroelectronics 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7/dts-v1/; 8#include <st/l4/stm32l4r9Xi.dtsi> 9#include <st/l4/stm32l4r9z(g-i)tx-pinctrl.dtsi> 10#include <zephyr/dt-bindings/input/input-event-codes.h> 11 12/ { 13 model = "STMicroelectronics SensorTile.box board"; 14 compatible = "st,sensortile-box"; 15 16 chosen { 17 zephyr,console = &usart1; 18 zephyr,shell-uart = &usart1; 19 zephyr,sram = &sram0; 20 zephyr,flash = &flash0; 21 zephyr,bt-c2h-uart = &usart1; 22 zephyr,bt-hci = &spbtle_1s_sensortile_box; 23 }; 24 25 leds { 26 compatible = "gpio-leds"; 27 blue_led: led { 28 gpios = <&gpiob 15 GPIO_ACTIVE_HIGH>; 29 label = "User LD1"; 30 }; 31 32 green_led: led_2 { 33 gpios = <&gpiof 2 GPIO_ACTIVE_HIGH>; 34 label = "User LD4"; 35 }; 36 }; 37 38 gpio_keys { 39 compatible = "gpio-keys"; 40 user_button: button { 41 label = "User PB1"; 42 gpios = <&gpiog 1 GPIO_ACTIVE_LOW>; 43 zephyr,code = <INPUT_KEY_0>; 44 }; 45 }; 46 47 aliases { 48 led0 = &blue_led; 49 led1 = &green_led; 50 sw0 = &user_button; 51 magn0 = &lis2mdl; 52 accel0 = &lis2dw12; 53 accel1 = &lsm6dso; 54 accel2 = &iis3dhhc; 55 }; 56}; 57 58&clk_lsi { 59 status = "okay"; 60}; 61 62&clk_hsi48 { 63 status = "okay"; 64}; 65 66&clk_hse { 67 clock-frequency = <DT_FREQ_M(16)>; 68 status = "okay"; 69}; 70 71&pll { 72 div-m = <4>; 73 mul-n = <40>; 74 div-p = <7>; 75 div-q = <2>; 76 div-r = <2>; 77 clocks = <&clk_hse>; 78 status = "okay"; 79}; 80 81&rcc { 82 clocks = <&pll>; 83 clock-frequency = <DT_FREQ_M(80)>; 84 ahb-prescaler = <1>; 85 apb1-prescaler = <1>; 86 apb2-prescaler = <1>; 87}; 88 89&usart1 { 90 pinctrl-0 = <&usart1_tx_pa9 &usart1_rx_pa10>; 91 pinctrl-names = "default"; 92 current-speed = <115200>; 93 status = "okay"; 94}; 95 96&usart2 { 97 pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>; 98 pinctrl-names = "default"; 99 current-speed = <115200>; 100 status = "okay"; 101}; 102 103&i2c1 { 104 pinctrl-0 = <&i2c1_scl_pb6 &i2c1_sda_pb7>; 105 pinctrl-names = "default"; 106 status = "okay"; 107 clock-frequency = <I2C_BITRATE_FAST>; 108 109 hts221@5f { 110 compatible = "st,hts221"; 111 reg = <0x5f>; 112 drdy-gpios = <&gpiod 13 GPIO_ACTIVE_HIGH>; 113 }; 114 115 lps22hh@5d { 116 compatible = "st,lps22hh"; 117 reg = <0x5d>; 118 drdy-gpios = <&gpiod 15 GPIO_ACTIVE_HIGH>; 119 }; 120}; 121 122&i2c3 { 123 pinctrl-0 = <&i2c3_scl_pg7 &i2c3_sda_pg8>; 124 pinctrl-names = "default"; 125 status = "okay"; 126 clock-frequency = <I2C_BITRATE_FAST>; 127 128 stts751@38 { 129 compatible = "st,stts751"; 130 reg = <0x38>; 131 drdy-gpios = <&gpiog 5 GPIO_ACTIVE_LOW>; 132 }; 133}; 134 135&spi1 { 136 pinctrl-0 = <&spi1_nss_pe12 &spi1_sck_pe13 137 &spi1_miso_pe14 &spi1_mosi_pe15>; 138 pinctrl-names = "default"; 139 status = "okay"; 140 141 cs-gpios = <&gpioe 11 GPIO_ACTIVE_LOW>, <&gpioe 12 GPIO_ACTIVE_LOW>, <&gpioe 10 GPIO_ACTIVE_LOW>; 142 143 lis2dw12: lis2dw12@0 { 144 compatible = "st,lis2dw12"; 145 spi-max-frequency = <1000000>; 146 reg = <0>; 147 irq-gpios = <&gpioc 5 GPIO_ACTIVE_HIGH>; 148 }; 149 150 lsm6dso: lsm6dso@1 { 151 compatible = "st,lsm6dso"; 152 spi-max-frequency = <1000000>; 153 reg = <1>; 154 irq-gpios = <&gpioa 2 GPIO_ACTIVE_HIGH>; 155 int-pin = <1>; 156 }; 157 158 iis3dhhc: iis3dhhc@2 { 159 compatible = "st,iis3dhhc"; 160 spi-max-frequency = <1000000>; 161 reg = <2>; 162 irq-gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>, <&gpioe 6 GPIO_ACTIVE_HIGH>; 163 }; 164}; 165 166&spi2 { 167 pinctrl-0 = <&spi2_sck_pd1 &spi2_miso_pd3 &spi2_mosi_pc3>; 168 pinctrl-names = "default"; 169 status = "okay"; 170 cs-gpios = <&gpiod 0 GPIO_ACTIVE_LOW>; 171 spbtle_1s_sensortile_box: spbtle-1s@0 { 172 compatible = "st,hci-spi-v2"; 173 reg = <0>; 174 reset-gpios = <&gpioa 8 GPIO_ACTIVE_LOW>; 175 irq-gpios = <&gpiod 4 (GPIO_ACTIVE_HIGH | GPIO_PULL_DOWN)>; 176 spi-max-frequency = <DT_FREQ_M(1)>; 177 spi-cpha; 178 spi-hold-cs; 179 reset-assert-duration-ms = <6>; 180 }; 181}; 182 183&spi3 { 184 pinctrl-0 = <&spi3_nss_pa15 &spi3_sck_pb3 185 &spi3_miso_pb4 &spi3_mosi_pb5>; 186 pinctrl-names = "default"; 187 status = "okay"; 188 189 cs-gpios = <&gpioa 15 GPIO_ACTIVE_LOW>; 190 191 lis2mdl: lis2mdl@0 { 192 compatible = "st,lis2mdl"; 193 spi-max-frequency = <1000000>; 194 reg = <0>; 195 }; 196}; 197 198zephyr_udc0: &usbotg_fs { 199 pinctrl-0 = <&usb_otg_fs_dm_pa11 &usb_otg_fs_dp_pa12>; 200 pinctrl-names = "default"; 201 status = "okay"; 202}; 203 204&rtc { 205 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, 206 <&rcc STM32_SRC_LSI RTC_SEL(2)>; 207 status = "okay"; 208}; 209 210&flash0 { 211 212 partitions { 213 compatible = "fixed-partitions"; 214 #address-cells = <1>; 215 #size-cells = <1>; 216 217 boot_partition: partition@0 { 218 label = "mcuboot"; 219 reg = <0x00000000 DT_SIZE_K(64)>; 220 read-only; 221 }; 222 223 /* 224 * The flash starting at offset 0x10000 and ending at 225 * offset 0x1ffff is reserved for use by the application. 226 */ 227 228 slot0_partition: partition@20000 { 229 label = "image-0"; 230 reg = <0x00020000 DT_SIZE_K(432)>; 231 }; 232 slot1_partition: partition@8c000 { 233 label = "image-1"; 234 reg = <0x0008C000 DT_SIZE_K(432)>; 235 }; 236 scratch_partition: partition@f8000 { 237 label = "image-scratch"; 238 reg = <0x000F8000 DT_SIZE_K(24)>; 239 }; 240 241 storage_partition: partition@fc000 { 242 label = "storage"; 243 reg = <0x000fc000 DT_SIZE_K(24)>; 244 }; 245 }; 246}; 247