1/* 2 * Copyright (c) 2018 Philémon Jaermann 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7/dts-v1/; 8#include <st/f4/stm32f446Xe.dtsi> 9#include <st/f4/stm32f446r(c-e)tx-pinctrl.dtsi> 10#include "arduino_r3_connector.dtsi" 11#include "st_morpho_connector.dtsi" 12#include <zephyr/dt-bindings/input/input-event-codes.h> 13 14/ { 15 model = "STMicroelectronics STM32F446RE-NUCLEO board"; 16 compatible = "st,stm32f446re-nucleo"; 17 18 chosen { 19 zephyr,console = &usart2; 20 zephyr,shell-uart = &usart2; 21 zephyr,sram = &sram0; 22 zephyr,flash = &flash0; 23 zephyr,canbus = &can2; 24 }; 25 26 leds: leds { 27 compatible = "gpio-leds"; 28 green_led_2: led_2 { 29 gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>; 30 label = "User LD2"; 31 }; 32 }; 33 34 pwmleds { 35 compatible = "pwm-leds"; 36 green_pwm_led: green_pwm_led { 37 pwms = <&pwm2 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>; 38 }; 39 }; 40 41 gpio_keys { 42 compatible = "gpio-keys"; 43 user_button: button { 44 label = "User"; 45 gpios = <&gpioc 13 GPIO_ACTIVE_LOW>; 46 zephyr,code = <INPUT_KEY_0>; 47 }; 48 }; 49 50 aliases { 51 led0 = &green_led_2; 52 pwm-led0 = &green_pwm_led; 53 sw0 = &user_button; 54 }; 55}; 56 57&clk_lsi { 58 status = "okay"; 59}; 60 61&clk_hse { 62 hse-bypass; 63 clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */ 64 status = "okay"; 65}; 66 67&pll { 68 div-m = <8>; 69 mul-n = <384>; 70 div-p = <4>; 71 div-q = <8>; 72 clocks = <&clk_hse>; 73 status = "okay"; 74}; 75 76&rcc { 77 clocks = <&pll>; 78 clock-frequency = <DT_FREQ_M(96)>; 79 ahb-prescaler = <1>; 80 apb1-prescaler = <2>; 81 apb2-prescaler = <1>; 82}; 83 84&usart1 { 85 pinctrl-0 = <&usart1_tx_pb6 &usart1_rx_pb7>; 86 pinctrl-names = "default"; 87 current-speed = <115200>; 88 status = "okay"; 89}; 90 91&usart2 { 92 pinctrl-0 = <&usart2_tx_pa2 &usart2_rx_pa3>; 93 pinctrl-names = "default"; 94 current-speed = <115200>; 95 status = "okay"; 96}; 97 98&i2c1 { 99 pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>; 100 pinctrl-names = "default"; 101 status = "okay"; 102 clock-frequency = <I2C_BITRATE_FAST>; 103}; 104 105&i2c2 { 106 pinctrl-0 = <&i2c2_scl_pb10 &i2c2_sda_pb3>; 107 pinctrl-names = "default"; 108 status = "okay"; 109 clock-frequency = <I2C_BITRATE_FAST>; 110}; 111 112&i2c3 { 113 pinctrl-0 = <&i2c3_scl_pa8 &i2c3_sda_pb4>; 114 pinctrl-names = "default"; 115 status = "okay"; 116 clock-frequency = <I2C_BITRATE_FAST>; 117}; 118 119&spi1 { 120 pinctrl-0 = <&spi1_nss_pa4 &spi1_sck_pa5 121 &spi1_miso_pa6 &spi1_mosi_pa7>; 122 pinctrl-names = "default"; 123 status = "okay"; 124}; 125 126&timers2 { 127 status = "okay"; 128 129 pwm2: pwm { 130 status = "okay"; 131 pinctrl-0 = <&tim2_ch1_pa5>; 132 pinctrl-names = "default"; 133 }; 134}; 135 136&rtc { 137 clocks = <&rcc STM32_CLOCK_BUS_APB1 0x10000000>, 138 <&rcc STM32_SRC_LSI RTC_SEL(2)>; 139 status = "okay"; 140}; 141 142&backup_sram { 143 status = "okay"; 144}; 145 146&can1 { 147 /* CAUTION: PB8 and PB9 may conflict with same pins of I2C1 */ 148 pinctrl-0 = <&can1_rx_pb8 &can1_tx_pb9>; 149 pinctrl-names = "default"; 150 status = "okay"; 151}; 152 153&can2 { 154 pinctrl-0 = <&can2_rx_pb12 &can2_tx_pb13>; 155 pinctrl-names = "default"; 156 status = "okay"; 157}; 158 159&flash0 { 160 161 partitions { 162 compatible = "fixed-partitions"; 163 #address-cells = <1>; 164 #size-cells = <1>; 165 166 boot_partition: partition@0 { 167 label = "mcuboot"; 168 reg = <0x00000000 DT_SIZE_K(64)>; 169 read-only; 170 }; 171 172 /* 173 * The flash starting at 0x00010000 and ending at 174 * 0x0001ffff (sectors 16-31) is reserved for use 175 * by the application. 176 */ 177 storage_partition: partition@10000 { 178 label = "storage"; 179 reg = <0x00010000 DT_SIZE_K(64)>; 180 }; 181 182 slot0_partition: partition@20000 { 183 label = "image-0"; 184 reg = <0x00020000 DT_SIZE_K(128)>; 185 }; 186 slot1_partition: partition@40000 { 187 label = "image-1"; 188 reg = <0x00040000 DT_SIZE_K(128)>; 189 }; 190 scratch_partition: partition@60000 { 191 label = "image-scratch"; 192 reg = <0x00060000 DT_SIZE_K(128)>; 193 }; 194 }; 195}; 196